From patrick@blueri.se Sun Feb 11 12:41:07 2018 Delivered-To: david@gwynne.id.au Received: by 10.129.68.3 with SMTP id r3csp2737831ywa; Sat, 10 Feb 2018 18:41:07 -0800 (PST) X-Google-Smtp-Source: AH8x225YlaWk8BsrfM93s9iamsZQvEf1hN2jz6wJw5kQn0TKVX2Jn8+/qs430yq45v3lbbDnoFJg X-Received: by 10.176.7.39 with SMTP id h36mr5163839uah.117.1518316867382; Sat, 10 Feb 2018 18:41:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518316867; cv=none; d=google.com; s=arc-20160816; b=s+8FI3uXsN/spA2lXOAERhEX3m9pqt1sBshwxyd/klJSDzI1rQW2jVmlzw8YT0OzvE kDUQGegt/iMJMYBnzRUeeDmP4YFJv7+O5kDLf2LUPueA7SjI6o8fxrx6HK8YHbZ48zEa IlaEaKm61F+PydnXJIKEpjmdiFBv/JYr2FQNsskLy4cb6FLln7RlT7EDm5of2FFKUbVw d8UTXlmKhFluqPBs0qJ90anp0s9G2N3lWY9PcGHBZxByGwCO2YZGNb/vkPGwYuHH6PI7 2WknpoZdq16EsTK/vo7DWL0mP8xgUKEzysYSFDXsu5EV73t+tei+RqWbeXP9rL/rhFaX L1Tg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=user-agent:content-disposition:mime-version:message-id:subject:cc :to:from:date:arc-authentication-results; bh=n6n1D1/hpHbP8ru7Okh5r+0AumPhmDNvgDbHxzbu7HI=; b=KgwUz4A3c6GRu7Z4c5Xwla+4iwX+PthL5/qHIxFA9yax1Z6t+x03+7kygmuo19Jlld Bvo+vhq2zKBK36O7fiay/1qlrAS/Dav+wCgG4EDb1SjsPtd2W1cNj3wP667iiLN7vuOp Sy8jbVR53vc+mZNw+j44HgcZOdkl52ilDUmK/JC0p2ZJt5DbMhqP3nysxzT4j90hV25H RGme2Niar/7HxgYQMxhGq6DUGIsirxpIZmi4HBy7Ydb5Z5ZgFEymWskO/flhx+VqVppu gCM43O0xD447FWkGh7gRLDWuqWZ5ElhyL04RdwGieqQbwxNviOnz9k225KCZp+OBVQvQ 8m9g== ARC-Authentication-Results: i=1; mx.google.com; spf=fail (google.com: domain of patrick@blueri.se does not designate 192.43.244.163 as permitted sender) smtp.mailfrom=patrick@blueri.se Return-Path: Received: from openbsd.org (lists.openbsd.org. [192.43.244.163]) by mx.google.com with ESMTPS id x34si2470665uax.334.2018.02.10.18.41.06 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 10 Feb 2018 18:41:07 -0800 (PST) Received-SPF: fail (google.com: domain of patrick@blueri.se does not designate 192.43.244.163 as permitted sender) client-ip=192.43.244.163; Authentication-Results: mx.google.com; spf=fail (google.com: domain of patrick@blueri.se does not designate 192.43.244.163 as permitted sender) smtp.mailfrom=patrick@blueri.se Received: from pony.blueri.se (pony.blueri.se [163.172.214.9]) by openbsd.org (OpenSMTPD) with ESMTPS id 2f0569a1 (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384:256:NO); Sat, 10 Feb 2018 19:41:06 -0700 (MST) Received: from nyx.local (nat-uo-conf-01.otago.ac.nz [139.80.206.150]) by pony.blueri.se (OpenSMTPD) with ESMTPSA id ef3c951b (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384:256:NO); Sun, 11 Feb 2018 03:41:02 +0100 (CET) Date: Sun, 11 Feb 2018 15:40:54 +1300 From: Patrick Wildt To: kettenis@openbsd.org Cc: dlg@openbsd.org Subject: msix: attach to specific cpu, count number of MSIX interrupts Message-ID: <20180211024052.GA19875@nyx.local> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.9.3 (2018-01-21) Status: RO X-Status: A Content-Length: 16584 Lines: 434 Hi, as discussed with dlg@, this diff adds support for establishing MSI-X interrupts on other CPUs than the primary. First of all there's a new function that retrieves the number of available MSI-X interrupts, so that we can calculate the maximum number of queues we can use like this: msgs = pci_intr_msix_count(pa->pa_pc, pa->pa_tag); queues = MIN(msgs, ncpus); queues = MIN(queues, ixgbe_max_queues); And then we can map all queues. sc->num_queues is smaller than ncpus. for (i = 0, que = sc->queues; i < sc->num_queues; i++, que++) { if (pci_intr_map_msix_cpuid(pa, i, &que->ih, i)) { printf("ixgbe_allocate_msix: " "pci_intr_map_msix vec %d failed\n", i); error = ENOMEM; goto fail; } que->tag = pci_intr_establish(pa->pa_pc, que->ih, IPL_NET | IPL_MPSAFE, ixgbe_queue_intr, que, que->name); if (que->tag == NULL) { printf("ixgbe_allocate_msix: " "pci_intr_establish vec %d failed\n", i); error = ENOMEM; goto fail; } que->msix = i; } Mark, what do you think about this? Does it look good for you? I can't compile all architectures, but I hope I haven't broken them either. Patrick diff --git a/sys/arch/alpha/pci/pci_machdep.h b/sys/arch/alpha/pci/pci_machdep.h index 7168db82d87..0ae927f7ab0 100644 --- a/sys/arch/alpha/pci/pci_machdep.h +++ b/sys/arch/alpha/pci/pci_machdep.h @@ -105,6 +105,8 @@ int alpha_sysctl_chipset(int *, u_int, char *, size_t *); (*(c)->pc_conf_write)((c)->pc_conf_v, (t), (r), (v)) #define pci_intr_map_msi(pa, ihp) (-1) #define pci_intr_map_msix(pa, vec, ihp) (-1) +#define pci_intr_map_msix_cpuid(pa, vec, ihp, cpu) (-1) +#define pci_intr_msix_count(c, t) (0) #define pci_intr_string(c, ih) \ (*(c)->pc_intr_string)((c)->pc_intr_v, (ih)) #define pci_intr_line(c, ih) \ diff --git a/sys/arch/amd64/amd64/acpi_machdep.c b/sys/arch/amd64/amd64/acpi_machdep.c index 268bab12c7c..e793aee242e 100644 --- a/sys/arch/amd64/amd64/acpi_machdep.c +++ b/sys/arch/amd64/amd64/acpi_machdep.c @@ -142,7 +142,7 @@ acpi_intr_establish(int irq, int flags, int level, type = (flags & LR_EXTIRQ_MODE) ? IST_EDGE : IST_LEVEL; return (intr_establish(-1, (struct pic *)apic, map->ioapic_pin, - type, level, handler, arg, what)); + type, level, NULL, handler, arg, what)); #else return NULL; #endif diff --git a/sys/arch/amd64/amd64/intr.c b/sys/arch/amd64/amd64/intr.c index 34e132465f0..26bfc23686b 100644 --- a/sys/arch/amd64/amd64/intr.c +++ b/sys/arch/amd64/amd64/intr.c @@ -282,13 +282,20 @@ duplicate: } else { other: /* - * Otherwise, look for a free slot elsewhere. Do the primary - * CPU first. + * Otherwise, look for a free slot elsewhere. If cip is null, it + * means try primary cpu but accept secondary, otherwise we need + * a slot on the requested cpu. */ - ci = &cpu_info_primary; + if (*cip == NULL) + ci = &cpu_info_primary; + else + ci = *cip; error = intr_allocate_slot_cpu(ci, pic, pin, &slot); if (error == 0) goto found; + /* Can't alloc on the requested cpu, fail. */ + if (*cip != NULL) + return EBUSY; /* * ..now try the others. @@ -323,10 +330,9 @@ int intr_shared_edge; void * intr_establish(int legacy_irq, struct pic *pic, int pin, int type, int level, - int (*handler)(void *), void *arg, const char *what) + struct cpu_info *ci, int (*handler)(void *), void *arg, const char *what) { struct intrhand **p, *q, *ih; - struct cpu_info *ci; int slot, error, idt_vec; struct intrsource *source; struct intrstub *stubp; diff --git a/sys/arch/amd64/include/intr.h b/sys/arch/amd64/include/intr.h index 5cf93934e3e..619eca3fc3c 100644 --- a/sys/arch/amd64/include/intr.h +++ b/sys/arch/amd64/include/intr.h @@ -202,8 +202,8 @@ void intr_calculatemasks(struct cpu_info *); int intr_allocate_slot_cpu(struct cpu_info *, struct pic *, int, int *); int intr_allocate_slot(struct pic *, int, int, int, struct cpu_info **, int *, int *); -void *intr_establish(int, struct pic *, int, int, int, int (*)(void *), - void *, const char *); +void *intr_establish(int, struct pic *, int, int, int, + struct cpu_info *, int (*)(void *), void *, const char *); void intr_disestablish(struct intrhand *); int intr_handler(struct intrframe *, struct intrhand *); void cpu_intr_init(struct cpu_info *); diff --git a/sys/arch/amd64/include/pci_machdep.h b/sys/arch/amd64/include/pci_machdep.h index 27b833b52cc..e721cc50ebb 100644 --- a/sys/arch/amd64/include/pci_machdep.h +++ b/sys/arch/amd64/include/pci_machdep.h @@ -47,10 +47,12 @@ extern struct bus_dma_tag pci_bus_dma_tag; */ typedef void *pci_chipset_tag_t; typedef u_int32_t pcitag_t; +struct cpu_info; typedef struct { pcitag_t tag; int line, pin; + struct cpu_info *cpu; } pci_intr_handle_t; #define pci_intr_line(pc,ih) ((ih.line) & 0xff) @@ -86,6 +88,9 @@ int pci_intr_map_msi(struct pci_attach_args *, pci_intr_handle_t *); int pci_intr_map_msix(struct pci_attach_args *, int, pci_intr_handle_t *); +int pci_intr_map_msix_cpuid(struct pci_attach_args *, + int, pci_intr_handle_t *, int); +int pci_intr_msix_count(pci_chipset_tag_t, pcitag_t); int pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *); const char *pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t); void *pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, diff --git a/sys/arch/amd64/isa/isa_machdep.c b/sys/arch/amd64/isa/isa_machdep.c index e1579d9bc90..fdb65d44405 100644 --- a/sys/arch/amd64/isa/isa_machdep.c +++ b/sys/arch/amd64/isa/isa_machdep.c @@ -312,7 +312,7 @@ isa_intr_establish(isa_chipset_tag_t ic, int irq, int type, int level, KASSERT(pic); - return intr_establish(irq, pic, pin, type, level, ih_fun, + return intr_establish(irq, pic, pin, type, level, NULL, ih_fun, ih_arg, ih_what); } diff --git a/sys/arch/amd64/pci/pci_machdep.c b/sys/arch/amd64/pci/pci_machdep.c index 2ea97e1ab36..d07bdbaf0fa 100644 --- a/sys/arch/amd64/pci/pci_machdep.c +++ b/sys/arch/amd64/pci/pci_machdep.c @@ -386,6 +386,7 @@ pci_intr_map_msi(struct pci_attach_args *pa, pci_intr_handle_t *ihp) ihp->tag = tag; ihp->line = APIC_INT_VIA_MSG; ihp->pin = 0; + ihp->cpu = NULL; return 0; } @@ -505,11 +506,28 @@ msix_delroute(struct pic *pic, struct cpu_info *ci, int pin, int vec, int type) } int -pci_intr_map_msix(struct pci_attach_args *pa, int vec, pci_intr_handle_t *ihp) +pci_intr_msix_count(pci_chipset_tag_t pc, pcitag_t tag) +{ + pcireg_t reg; + int off; + + if (pci_get_capability(pc, tag, PCI_CAP_MSIX, &off, NULL) == 0) + return (0); + + reg = pci_conf_read(pc, tag, off + PCI_MSIX_CTL); + + return (PCI_MSIX_CTL_TBLSIZE(reg)); +} + +int +pci_intr_map_msix_cpuid(struct pci_attach_args *pa, int vec, + pci_intr_handle_t *ihp, int cpuid) { pci_chipset_tag_t pc = pa->pa_pc; pcitag_t tag = pa->pa_tag; pcireg_t reg; + struct cpu_info *ci = NULL; + CPU_INFO_ITERATOR cii; KASSERT(PCI_MSIX_VEC(vec) == vec); @@ -520,12 +538,28 @@ pci_intr_map_msix(struct pci_attach_args *pa, int vec, pci_intr_handle_t *ihp) if (vec > PCI_MSIX_MC_TBLSZ(reg)) return 1; + if (cpuid != -1) { + CPU_INFO_FOREACH(cii, ci) { + if (ci->ci_cpuid == cpuid) + break; + } + if (ci == NULL) + return (ENOENT); + } + ihp->tag = PCI_MSIX_PIN(tag, vec); ihp->line = APIC_INT_VIA_MSGX; ihp->pin = 0; + ihp->cpu = ci; return 0; } +int +pci_intr_map_msix(struct pci_attach_args *pa, int vec, pci_intr_handle_t *ihp) +{ + return (pci_intr_map_msix_cpuid(pa, vec, ihp, -1)); +} + int pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) { @@ -549,6 +583,7 @@ pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) ihp->tag = pa->pa_tag; ihp->line = line; ihp->pin = pin; + ihp->cpu = NULL; #if NIOAPIC > 0 pci_decompose_tag(pa->pa_pc, pa->pa_tag, &bus, &dev, &func); @@ -690,11 +725,11 @@ pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, if (ih.line & APIC_INT_VIA_MSG) { return intr_establish(-1, &msi_pic, tag, IST_PULSE, level, - func, arg, what); + ih.cpu, func, arg, what); } if (ih.line & APIC_INT_VIA_MSGX) { return intr_establish(-1, &msix_pic, tag, IST_PULSE, level, - func, arg, what); + ih.cpu, func, arg, what); } pci_decompose_tag(pc, ih.tag, &bus, &dev, NULL); @@ -720,7 +755,8 @@ pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, } #endif - return intr_establish(irq, pic, pin, IST_LEVEL, level, func, arg, what); + return intr_establish(irq, pic, pin, IST_LEVEL, level, NULL, + func, arg, what); } void diff --git a/sys/arch/arm/include/pci_machdep.h b/sys/arch/arm/include/pci_machdep.h index 94517e8f20c..f1abc69f9f8 100644 --- a/sys/arch/arm/include/pci_machdep.h +++ b/sys/arch/arm/include/pci_machdep.h @@ -94,6 +94,8 @@ struct arm32_pci_chipset { (*(pa)->pa_pc->pc_intr_map)((pa), (ihp)) #define pci_intr_map_msi(pa, ihp) (-1) #define pci_intr_map_msix(pa, vec, ihp) (-1) +#define pci_intr_map_msix_cpuid(pa, vec, ihp, cpu) (-1) +#define pci_intr_msix_count(c, t) (0) #define pci_intr_string(c, ih) \ (*(c)->pc_intr_string)((c)->pc_intr_v, (ih)) #define pci_intr_establish(c, ih, l, h, a, n) \ diff --git a/sys/arch/arm64/include/pci_machdep.h b/sys/arch/arm64/include/pci_machdep.h index a387a8badb6..f4131e84d7f 100644 --- a/sys/arch/arm64/include/pci_machdep.h +++ b/sys/arch/arm64/include/pci_machdep.h @@ -84,6 +84,8 @@ struct arm64_pci_chipset { (*(c)->pa_pc->pc_intr_map_msi)((c), (ihp)) #define pci_intr_map_msix(c, vec, ihp) \ (*(c)->pa_pc->pc_intr_map_msix)((c), (vec), (ihp)) +#define pci_intr_map_msix_cpuid(c, vec, ihp, cpu) (-1) +#define pci_intr_msix_count(c, t) (0) #define pci_intr_string(c, ih) \ (*(c)->pc_intr_string)((c)->pc_intr_v, (ih)) #define pci_intr_establish(c, ih, l, h, a, nm) \ diff --git a/sys/arch/hppa/include/pci_machdep.h b/sys/arch/hppa/include/pci_machdep.h index 7e3d77b6f87..481baa8ad2a 100644 --- a/sys/arch/hppa/include/pci_machdep.h +++ b/sys/arch/hppa/include/pci_machdep.h @@ -82,6 +82,8 @@ struct hppa_pci_chipset_tag { (*(p)->pa_pc->pc_intr_map)((p), (ihp)) #define pci_intr_map_msi(p, ihp) (-1) #define pci_intr_map_msix(p, vec, ihp) (-1) +#define pci_intr_map_msix_cpuid(p, vec, ihp, cpu) (-1) +#define pci_intr_msix_count(c, t) (0) #define pci_intr_line(c, ih) (ih) #define pci_intr_string(c, ih) \ (*(c)->pc_intr_string)((c)->_cookie, (ih)) diff --git a/sys/arch/i386/pci/pci_machdep.h b/sys/arch/i386/pci/pci_machdep.h index 283147033ca..ec794636567 100644 --- a/sys/arch/i386/pci/pci_machdep.h +++ b/sys/arch/i386/pci/pci_machdep.h @@ -100,6 +100,8 @@ struct pci_attach_args; int pci_intr_map_msi(struct pci_attach_args *, pci_intr_handle_t *); int pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *); #define pci_intr_map_msix(p, vec, ihp) (-1) +#define pci_intr_map_msix_cpuid(p, vec, ihp, cpu) (-1) +#define pci_intr_msix_count(c, t) (0) #define pci_intr_line(c, ih) ((ih).line) const char *pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t); void *pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, diff --git a/sys/arch/landisk/include/pci_machdep.h b/sys/arch/landisk/include/pci_machdep.h index 6d24a51d979..5d50af17c1a 100644 --- a/sys/arch/landisk/include/pci_machdep.h +++ b/sys/arch/landisk/include/pci_machdep.h @@ -77,6 +77,8 @@ void landisk_pci_conf_interrupt(void *v, int bus, int dev, int pin, landisk_pci_intr_map(pa, ihp) #define pci_intr_map_msi(pa, ihp) (-1) #define pci_intr_map_msix(pa, vec, ihp) (-1) +#define pci_intr_map_msix_cpuid(pa, vec, ihp, cpu) (-1) +#define pci_intr_msix_count(c, t) (0) #define pci_intr_string(v, ih) \ landisk_pci_intr_string(v, ih) #define pci_intr_establish(v, ih, level, ih_fun, ih_arg, ih_name) \ diff --git a/sys/arch/loongson/include/pci_machdep.h b/sys/arch/loongson/include/pci_machdep.h index 32f50c4e9de..1b441eef5ae 100644 --- a/sys/arch/loongson/include/pci_machdep.h +++ b/sys/arch/loongson/include/pci_machdep.h @@ -77,6 +77,8 @@ struct mips_pci_chipset { (*(c)->pa_pc->pc_intr_map)((c), (ihp)) #define pci_intr_map_msi(c, ihp) (-1) #define pci_intr_map_msix(c, vec, ihp) (-1) +#define pci_intr_map_msix_cpuid(c, vec, ihp, cpu) (-1) +#define pci_intr_msix_count(c, t) (0) #define pci_intr_string(c, ih) \ (*(c)->pc_intr_string)((c)->pc_intr_v, (ih)) #define pci_intr_establish(c, ih, l, h, a, nm) \ diff --git a/sys/arch/macppc/include/pci_machdep.h b/sys/arch/macppc/include/pci_machdep.h index 51ff69bdbd1..c62a4d796db 100644 --- a/sys/arch/macppc/include/pci_machdep.h +++ b/sys/arch/macppc/include/pci_machdep.h @@ -86,6 +86,8 @@ void pci_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); int pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *); int pci_intr_map_msi(struct pci_attach_args *, pci_intr_handle_t *); #define pci_intr_map_msix(p, vec, ihp) (-1) +#define pci_intr_map_msix_cpuid(p, vec, ihp, cpu) (-1) +#define pci_intr_msix_count(c, t) (0) int pci_intr_line(pci_chipset_tag_t, pci_intr_handle_t); const char *pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t); void *pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, diff --git a/sys/arch/octeon/include/pci_machdep.h b/sys/arch/octeon/include/pci_machdep.h index 0793512cd56..5abaebc256e 100644 --- a/sys/arch/octeon/include/pci_machdep.h +++ b/sys/arch/octeon/include/pci_machdep.h @@ -105,6 +105,8 @@ static inline void pci_conf_write_db(void * c, pcitag_t t, int r, pcireg_t v, (*(c)->pa_pc->pc_intr_map)((c), (ihp)) #define pci_intr_map_msi(c, ihp) (-1) #define pci_intr_map_msix(c, vec, ihp) (-1) +#define pci_intr_map_msix_cpuid(c, vec, ihp, cpu) (-1) +#define pci_intr_msix_count(c, t) (0) #define pci_intr_string(c, ih) \ (*(c)->pc_intr_string)((c)->pc_intr_v, (ih)) #define pci_intr_establish(c, ih, l, h, a, nm) \ diff --git a/sys/arch/sgi/pci/pci_machdep.h b/sys/arch/sgi/pci/pci_machdep.h index 3c656596bb6..d1c19eced98 100644 --- a/sys/arch/sgi/pci/pci_machdep.h +++ b/sys/arch/sgi/pci/pci_machdep.h @@ -88,6 +88,8 @@ struct mips_pci_chipset { (*(c)->pa_pc->pc_intr_map)((c), (ihp)) #define pci_intr_map_msi(c, ihp) (-1) #define pci_intr_map_msix(c, vec, ihp) (-1) +#define pci_intr_map_msix_cpuid(c, vec, ihp, cpu) (-1) +#define pci_intr_msix_count(c, t) (0) #define pci_intr_string(c, ih) \ (*(c)->pc_intr_string)((c)->pc_intr_v, (ih)) #define pci_intr_establish(c, ih, l, h, a, nm) \ diff --git a/sys/arch/socppc/include/pci_machdep.h b/sys/arch/socppc/include/pci_machdep.h index 0553eb73b6c..881939359c5 100644 --- a/sys/arch/socppc/include/pci_machdep.h +++ b/sys/arch/socppc/include/pci_machdep.h @@ -87,6 +87,8 @@ struct ppc_pci_chipset { (pa)->pa_intrtag, (pa)->pa_intrpin, (pa)->pa_intrline, (ihp)) #define pci_intr_map_msi(pa, ihp) (-1) #define pci_intr_map_msix(pa, vec, ihp) (-1) +#define pci_intr_map_msix_cpuid(pa, vec, ihp, cpu) (-1) +#define pci_intr_msix_count(c, t) (0) #define pci_intr_string(c, ih) \ (*(c)->pc_intr_string)((c)->pc_intr_v, (ih)) #define pci_intr_line(c, ih) \ diff --git a/sys/arch/sparc64/include/pci_machdep.h b/sys/arch/sparc64/include/pci_machdep.h index bd48fe9e075..8a5ffe683fe 100644 --- a/sys/arch/sparc64/include/pci_machdep.h +++ b/sys/arch/sparc64/include/pci_machdep.h @@ -89,6 +89,8 @@ void pci_conf_write(pci_chipset_tag_t, pcitag_t, int, int pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *); int pci_intr_map_msi(struct pci_attach_args *, pci_intr_handle_t *); #define pci_intr_map_msix(pa, vec, ihp) (-1) +#define pci_intr_map_msix_cpuid(pa, vec, ihp, cpu) (-1) +#define pci_intr_msix_count(c, t) (0) int pci_intr_line(pci_chipset_tag_t, pci_intr_handle_t); const char *pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t); void *pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, diff --git a/sys/dev/pci/pcireg.h b/sys/dev/pci/pcireg.h index feaa9bc6f47..c6f71a8365e 100644 --- a/sys/dev/pci/pcireg.h +++ b/sys/dev/pci/pcireg.h @@ -603,6 +603,19 @@ typedef u_int8_t pci_revision_t; #define PCI_PCIE_RCSR 0x1c #define PCI_PCIE_LCAP2 0x2c +/* + * Capability ID: 0x11 + * MSIX + */ + +#define PCI_MSIX_CTL 0x00 +#define PCI_MSIX_CTL_ENABLE 0x80000000 +#define PCI_MSIX_CTL_FUNCMASK 0x40000000 +#define PCI_MSIX_CTL_TBLSIZE_MASK 0x07ff0000 +#define PCI_MSIX_CTL_TBLSIZE_SHIFT 16 +#define PCI_MSIX_CTL_TBLSIZE(ofs) \ + ((((ofs) & PCI_MSIX_CTL_TBLSIZE_MASK) >> PCI_MSIX_CTL_TBLSIZE_SHIFT) + 1) + /* * PCI Express; enhanced capabilities */