Index: amd64/acpi_machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/acpi_machdep.c,v
retrieving revision 1.90
diff -u -p -r1.90 acpi_machdep.c
--- amd64/acpi_machdep.c	12 Apr 2020 09:21:19 -0000	1.90
+++ amd64/acpi_machdep.c	11 Jun 2020 04:16:19 -0000
@@ -195,7 +195,7 @@ acpi_intr_establish(int irq, int flags, 
 
 	type = (flags & LR_EXTIRQ_MODE) ? IST_EDGE : IST_LEVEL;
 	return (intr_establish(-1, (struct pic *)apic, map->ioapic_pin,
-	    type, level, handler, arg, what));
+	    type, level, NULL, handler, arg, what));
 #else
 	return NULL;
 #endif
Index: amd64/intr.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/intr.c,v
retrieving revision 1.52
diff -u -p -r1.52 intr.c
--- amd64/intr.c	25 Mar 2019 18:45:27 -0000	1.52
+++ amd64/intr.c	11 Jun 2020 04:16:19 -0000
@@ -282,13 +282,21 @@ duplicate:
 	} else {
 other:
 		/*
-		 * Otherwise, look for a free slot elsewhere. Do the primary
-		 * CPU first.
+		 * Otherwise, look for a free slot elsewhere. If cip is null, it
+		 * means try primary cpu but accept secondary, otherwise we need
+		 * a slot on the requested cpu.
 		 */
-		ci = &cpu_info_primary;
+		if (*cip == NULL)
+			ci = &cpu_info_primary;
+		else
+			ci = *cip;
+
 		error = intr_allocate_slot_cpu(ci, pic, pin, &slot);
 		if (error == 0)
 			goto found;
+		/* Can't alloc on the requested cpu, fail. */
+		if (*cip != NULL)
+			return EBUSY;
 
 		/*
 		 * ..now try the others.
@@ -323,10 +331,9 @@ int	intr_shared_edge;
 
 void *
 intr_establish(int legacy_irq, struct pic *pic, int pin, int type, int level,
-    int (*handler)(void *), void *arg, const char *what)
+    struct cpu_info *ci, int (*handler)(void *), void *arg, const char *what)
 {
 	struct intrhand **p, *q, *ih;
-	struct cpu_info *ci;
 	int slot, error, idt_vec;
 	struct intrsource *source;
 	struct intrstub *stubp;
@@ -674,9 +681,10 @@ intr_printconfig(void)
 }
 
 void
-intr_barrier(void *ih)
+intr_barrier(void *cookie)
 {
-	sched_barrier(NULL);
+	struct intrhand *ih = cookie;
+	sched_barrier(ih->ih_cpu);
 }
 
 /*
Index: include/intr.h
===================================================================
RCS file: /cvs/src/sys/arch/amd64/include/intr.h,v
retrieving revision 1.31
diff -u -p -r1.31 intr.h
--- include/intr.h	21 Dec 2018 01:51:07 -0000	1.31
+++ include/intr.h	11 Jun 2020 04:16:19 -0000
@@ -201,8 +201,8 @@ void intr_calculatemasks(struct cpu_info
 int intr_allocate_slot_cpu(struct cpu_info *, struct pic *, int, int *);
 int intr_allocate_slot(struct pic *, int, int, int, struct cpu_info **, int *,
 	    int *);
-void *intr_establish(int, struct pic *, int, int, int, int (*)(void *),
-	    void *, const char *);
+void *intr_establish(int, struct pic *, int, int, int,
+	    struct cpu_info *, int (*)(void *), void *, const char *);
 void intr_disestablish(struct intrhand *);
 int intr_handler(struct intrframe *, struct intrhand *);
 void cpu_intr_init(struct cpu_info *);
Index: include/pci_machdep.h
===================================================================
RCS file: /cvs/src/sys/arch/amd64/include/pci_machdep.h,v
retrieving revision 1.28
diff -u -p -r1.28 pci_machdep.h
--- include/pci_machdep.h	25 Jun 2019 16:46:32 -0000	1.28
+++ include/pci_machdep.h	11 Jun 2020 04:16:19 -0000
@@ -87,6 +87,8 @@ int		pci_intr_map(struct pci_attach_args
 const char	*pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
 void		*pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
 		    int, int (*)(void *), void *, const char *);
+void		*pci_intr_establish_cpuid(pci_chipset_tag_t, pci_intr_handle_t,
+		    int, int (*)(void *), void *, const char *, int);
 void		pci_intr_disestablish(pci_chipset_tag_t, void *);
 #define	pci_probe_device_hook(c, a)	(0)
 
Index: isa/isa_machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/isa/isa_machdep.c,v
retrieving revision 1.29
diff -u -p -r1.29 isa_machdep.c
--- isa/isa_machdep.c	14 Oct 2017 04:44:43 -0000	1.29
+++ isa/isa_machdep.c	11 Jun 2020 04:16:19 -0000
@@ -312,7 +312,7 @@ isa_intr_establish(isa_chipset_tag_t ic,
 
 	KASSERT(pic);
 
-	return intr_establish(irq, pic, pin, type, level, ih_fun,
+	return intr_establish(irq, pic, pin, type, level, NULL, ih_fun,
 	    ih_arg, ih_what);
 }
 
Index: pci/pci_machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/pci/pci_machdep.c,v
retrieving revision 1.74
diff -u -p -r1.74 pci_machdep.c
--- pci/pci_machdep.c	14 May 2020 13:07:11 -0000	1.74
+++ pci/pci_machdep.c	11 Jun 2020 04:16:19 -0000
@@ -669,18 +669,36 @@ void *
 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
     int (*func)(void *), void *arg, const char *what)
 {
+	return pci_intr_establish_cpuid(pc, ih, level, func, arg, what, -1);
+}
+
+void *
+pci_intr_establish_cpuid(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level,
+    int (*func)(void *), void *arg, const char *what, int cpuid)
+{
 	int pin, irq;
 	int bus, dev;
 	pcitag_t tag = ih.tag;
 	struct pic *pic;
+	struct cpu_info *ci = NULL;
+	CPU_INFO_ITERATOR cii;
+
+	if (cpuid != -1) {
+		CPU_INFO_FOREACH(cii, ci) {
+			if (ci->ci_cpuid == cpuid)
+				break;
+		}
+		if (ci == NULL)
+			return (NULL);
+	}
 
 	if (ih.line & APIC_INT_VIA_MSG) {
 		return intr_establish(-1, &msi_pic, tag, IST_PULSE, level,
-		    func, arg, what);
+		    ci, func, arg, what);
 	}
 	if (ih.line & APIC_INT_VIA_MSGX) {
 		return intr_establish(-1, &msix_pic, tag, IST_PULSE, level,
-		    func, arg, what);
+		    ci, func, arg, what);
 	}
 
 	pci_decompose_tag(pc, ih.tag, &bus, &dev, NULL);
@@ -706,7 +724,8 @@ pci_intr_establish(pci_chipset_tag_t pc,
 	}
 #endif
 
-	return intr_establish(irq, pic, pin, IST_LEVEL, level, func, arg, what);
+	return intr_establish(irq, pic, pin, IST_LEVEL, level, ci,
+	    func, arg, what);
 }
 
 void