Index: mvclock.c
===================================================================
RCS file: /cvs/src/sys/dev/fdt/mvclock.c,v
retrieving revision 1.12
diff -u -p -r1.12 mvclock.c
--- mvclock.c	17 May 2022 10:09:40 -0000	1.12
+++ mvclock.c	4 Jun 2022 00:44:46 -0000
@@ -354,7 +354,22 @@ a3700_periph_sb_enable(void *cookie, uin
 uint32_t
 a3700_periph_sb_get_frequency(void *cookie, uint32_t *cells)
 {
+	struct mvclock_softc *sc = cookie;
 	uint32_t idx = cells[0];
+	uint32_t freq;
+
+	switch (idx) {
+	case PERIPH_SB_GBE1_CORE:
+		freq = a3700_periph_tbg_get_frequency(sc, 4);
+		freq /= a3700_periph_get_div(sc, PERIPH_DIV_SEL1, 13);
+		return freq;
+	case PERIPH_SB_GBE0_CORE:
+		freq = a3700_periph_tbg_get_frequency(sc, 5);
+		freq /= a3700_periph_get_div(sc, PERIPH_DIV_SEL1, 14);
+		return freq;
+	default:
+		break;
+	}
 
 	printf("%s: 0x%08x\n", __func__, idx);
 	return 0;
Index: if_mvneta.c
===================================================================
RCS file: /cvs/src/sys/dev/fdt/if_mvneta.c,v
retrieving revision 1.25
diff -u -p -r1.25 if_mvneta.c
--- if_mvneta.c	1 Jun 2022 08:19:15 -0000	1.25
+++ if_mvneta.c	4 Jun 2022 00:44:46 -0000
@@ -137,6 +137,8 @@ struct mvneta_softc {
 	bus_dma_tag_t sc_dmat;
 	void *sc_ih;
 
+	uint64_t		sc_clk_freq;
+
 	struct arpcom sc_ac;
 #define sc_enaddr sc_ac.ac_enaddr
 	struct mii_data sc_mii;
@@ -173,6 +175,8 @@ struct mvneta_softc {
 	int			 sc_sfp;
 	int			 sc_node;
 
+	struct if_device	 sc_ifd;
+
 #if NKSTAT > 0
 	struct mutex		 sc_kstat_lock;
 	struct timeout		 sc_kstat_tick;
@@ -453,6 +457,9 @@ mvneta_attach(struct device *parent, str
 	sc->sc_node = faa->fa_node;
 
 	clock_enable(faa->fa_node, NULL);
+	sc->sc_clk_freq = clock_get_frequency_idx(faa->fa_node, 0);
+	if (sc->sc_clk_freq == 0)
+		sc->sc_clk_freq = 250000000;
 
 	pinctrl_byname(faa->fa_node, "default");
 
@@ -536,7 +543,8 @@ mvneta_attach(struct device *parent, str
 
 	sc->sc_sfp = OF_getpropint(faa->fa_node, "sfp", 0);
 
-	printf(": address %s\n", ether_sprintf(sc->sc_enaddr));
+	printf(": address %s, freq %llu\n", ether_sprintf(sc->sc_enaddr),
+	    sc->sc_clk_freq);
 
 	/* disable port */
 	MVNETA_WRITE(sc, MVNETA_PMACC0,
@@ -790,6 +798,10 @@ mvneta_attach_deferred(struct device *se
 	if_attach(ifp);
 	ether_ifattach(ifp);
 
+	sc->sc_ifd.if_node = sc->sc_node;
+	sc->sc_ifd.if_ifp = ifp;
+	if_register(&sc->sc_ifd);
+
 #if NKSTAT > 0
 	mvneta_kstat_attach(sc);
 #endif
@@ -837,7 +849,7 @@ mvneta_intr(void *arg)
 	if (ic & MVNETA_PRXTXTI_TBTCQ(0))
 		mvneta_tx_proc(sc);
 
-	if (ic & MVNETA_PRXTXTI_RBICTAPQ(0))
+	if (ISSET(ic, MVNETA_PRXTXTI_RBICTAPQ(0) | MVNETA_PRXTXTI_RDTAQ(0)))
 		mvneta_rx_proc(sc);
 
 	return 1;
@@ -1134,9 +1146,21 @@ mvneta_up(struct mvneta_softc *sc)
 	MVNETA_WRITE(sc, MVNETA_PRXDQA(0), MVNETA_DMA_DVA(sc->sc_rxring));
 	MVNETA_WRITE(sc, MVNETA_PRXDQS(0), MVNETA_RX_RING_CNT |
 	    ((MCLBYTES >> 3) << 19));
+#if 0
 	MVNETA_WRITE(sc, MVNETA_PRXDQTH(0), 0);
+#else
+	MVNETA_WRITE(sc, MVNETA_PRXDQTH(0), (2 << 16) | 0xff);
+#endif
 	MVNETA_WRITE(sc, MVNETA_PRXC(0), 0);
 
+#if 0
+	MVNETA_WRITE(sc, MVNETA_PRXITTH(0), 0);
+#else
+	MVNETA_WRITE(sc, MVNETA_PRXITTH(0), sc->sc_clk_freq / 211);
+#endif
+	printf("%s: prxitth %08x\n", ifp->if_xname,
+	    MVNETA_READ(sc, MVNETA_PRXITTH(0)));
+
 	/* Set Tx queue bandwidth. */
 	MVNETA_WRITE(sc, MVNETA_TQTBCOUNT(0), 0x03ffffff);
 	MVNETA_WRITE(sc, MVNETA_TQTBCONFIG(0), 0x03ffffff);
@@ -1144,7 +1168,8 @@ mvneta_up(struct mvneta_softc *sc)
 	/* Set Tx descriptor ring data. */
 	MVNETA_WRITE(sc, MVNETA_PTXDQA(0), MVNETA_DMA_DVA(sc->sc_txring));
 	MVNETA_WRITE(sc, MVNETA_PTXDQS(0),
-	    MVNETA_PTXDQS_DQS(MVNETA_TX_RING_CNT));
+	    MVNETA_PTXDQS_DQS(MVNETA_TX_RING_CNT) |
+	    MVNETA_PTXDQS_TBT(ifp->if_txmit));
 
 	sc->sc_rx_prod = sc->sc_rx_cons = 0;
 
@@ -1178,7 +1203,8 @@ mvneta_up(struct mvneta_softc *sc)
 
 	/* Enable interrupt masks */
 	MVNETA_WRITE(sc, MVNETA_PRXTXTIM, MVNETA_PRXTXTI_RBICTAPQ(0) |
-	    MVNETA_PRXTXTI_TBTCQ(0) | MVNETA_PRXTXTI_PMISCICSUMMARY);
+	    MVNETA_PRXTXTI_TBTCQ(0) | MVNETA_PRXTXTI_RDTAQ(0) |
+	    MVNETA_PRXTXTI_PMISCICSUMMARY);
 	MVNETA_WRITE(sc, MVNETA_PMIM, MVNETA_PMI_PHYSTATUSCHNG |
 	    MVNETA_PMI_LINKCHANGE | MVNETA_PMI_PSCSYNCCHNG);