From mpi@openbsd.org Tue Jun 16 21:39:08 2015 Delivered-To: david@gwynne.id.au Received: by 10.194.186.241 with SMTP id fn17csp2024407wjc; Tue, 16 Jun 2015 04:39:09 -0700 (PDT) X-Received: by 10.170.220.214 with SMTP id m205mr40395014ykf.13.1434454749147; Tue, 16 Jun 2015 04:39:09 -0700 (PDT) Return-Path: Received: from cvs.openbsd.org (cvs.openbsd.org. [199.185.137.3]) by mx.google.com with ESMTPS id m126si217923ykd.59.2015.06.16.04.39.08 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 16 Jun 2015 04:39:08 -0700 (PDT) Received-SPF: pass (google.com: domain of mpi@openbsd.org designates 199.185.137.3 as permitted sender) client-ip=199.185.137.3; Authentication-Results: mx.google.com; spf=pass (google.com: domain of mpi@openbsd.org designates 199.185.137.3 as permitted sender) smtp.mail=mpi@openbsd.org Received: from shear.ucar.edu (lists.openbsd.org [192.43.244.163]) by cvs.openbsd.org (OpenSMTPD) with ESMTPS id fc0aad70 TLS version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL for ; Tue, 16 Jun 2015 05:39:07 -0600 (MDT) Received: from relay3-d.mail.gandi.net (relay3-d.mail.gandi.net [217.70.183.195]) by shear.ucar.edu (8.14.7/8.14.7) with ESMTP id t5GBd4vD030154 (version=TLSv1/SSLv3 cipher=DHE-DSS-AES256-SHA bits=256 verify=NO) for ; Tue, 16 Jun 2015 05:39:06 -0600 (MDT) Received: from mfilter14-d.gandi.net (mfilter14-d.gandi.net [217.70.178.142]) by relay3-d.mail.gandi.net (Postfix) with ESMTP id BEC11A80B8 for ; Tue, 16 Jun 2015 13:39:04 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at mfilter14-d.gandi.net Received: from relay3-d.mail.gandi.net ([217.70.183.195]) by mfilter14-d.gandi.net (mfilter14-d.gandi.net [10.0.15.180]) (amavisd-new, port 10024) with ESMTP id 8gBownFq2KVx for ; Tue, 16 Jun 2015 13:39:03 +0200 (CEST) X-Originating-IP: 195.132.27.120 Received: from figo.nolizard.org (195-132-27-120.rev.numericable.fr [195.132.27.120]) (Authenticated sender: mpieuchot@nolizard.org) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id EABBCA80DC for ; Tue, 16 Jun 2015 13:39:02 +0200 (CEST) Received: from localhost (figo.nolizard.org [local]); by figo.nolizard.org (OpenSMTPD) with ESMTPA id a2927c9b; for ; Tue, 16 Jun 2015 13:39:02 +0200 (CEST) Date: Tue, 16 Jun 2015 13:39:02 +0200 From: Martin Pieuchot To: dlg@openbsd.org Subject: macppc IPL_MPSAFE Message-ID: <20150616113902.GC14302@figo.nolizard.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) Status: RO Content-Length: 8302 Lines: 284 Is there any regression on Xserve G4? Index: macppc/dev/adb.c =================================================================== RCS file: /cvs/src/sys/arch/macppc/dev/adb.c,v retrieving revision 1.39 diff -u -p -r1.39 adb.c --- macppc/dev/adb.c 10 Aug 2013 08:13:32 -0000 1.39 +++ macppc/dev/adb.c 16 Jun 2015 11:30:31 -0000 @@ -1626,7 +1626,7 @@ adbattach(struct device *parent, struct } printf("\n"); - mac_intr_establish(parent, ca->ca_intr[0], IST_LEVEL, IPL_HIGH, + mac_intr_establish(parent, ca->ca_intr[0], IST_LEVEL, IPL_TTY, adb_intr, sc, sc->sc_dev.dv_xname); /* init powerpc globals which control RTC functionality */ Index: macppc/dev/macgpio.c =================================================================== RCS file: /cvs/src/sys/arch/macppc/dev/macgpio.c,v retrieving revision 1.7 diff -u -p -r1.7 macgpio.c --- macppc/dev/macgpio.c 3 Jun 2013 20:10:50 -0000 1.7 +++ macppc/dev/macgpio.c 16 Jun 2015 11:30:31 -0000 @@ -161,7 +161,7 @@ macgpio_gpio_attach(struct device *paren sc->sc_port = ((struct gpio_softc *) parent)->sc_port; - mac_intr_establish(parent, ca->ca_intr[0], IST_LEVEL, IPL_HIGH, + mac_intr_establish(parent, ca->ca_intr[0], IST_LEVEL, IPL_TTY, gpio_intr, sc, sc->sc_dev.dv_xname); printf(": irq %d\n", ca->ca_intr[0]); Index: macppc/dev/macintr.c =================================================================== RCS file: /cvs/src/sys/arch/macppc/dev/macintr.c,v retrieving revision 1.51 diff -u -p -r1.51 macintr.c --- macppc/dev/macintr.c 2 Apr 2015 11:12:24 -0000 1.51 +++ macppc/dev/macintr.c 16 Jun 2015 11:30:31 -0000 @@ -280,11 +280,7 @@ macintr_establish(void * lcv, int irq, i struct cpu_info *ci = curcpu(); struct intrq *iq; struct intrhand *ih; - int s; - -#if 0 -printf("macintr_establish, hI %d L %d %s", irq, level, ppc_intr_typename(type)); -#endif + int s, flags; if (!LEGAL_IRQ(irq) || type == IST_NONE) { printf("%s: bogus irq %d or type %d", __func__, irq, type); @@ -315,9 +311,15 @@ printf("macintr_establish, hI %d L %d %s break; } + flags = level & IPL_MPSAFE; + level &= ~IPL_MPSAFE; + + KASSERT(level <= IPL_TTY || level >= IPL_CLOCK || flags & IPL_MPSAFE); + ih->ih_fun = ih_fun; ih->ih_arg = ih_arg; ih->ih_level = level; + ih->ih_flags = flags; ih->ih_irq = irq; evcount_attach(&ih->ih_count, name, &ih->ih_irq); Index: macppc/dev/openpic.c =================================================================== RCS file: /cvs/src/sys/arch/macppc/dev/openpic.c,v retrieving revision 1.80 diff -u -p -r1.80 openpic.c --- macppc/dev/openpic.c 2 Jun 2015 13:53:43 -0000 1.80 +++ macppc/dev/openpic.c 16 Jun 2015 11:32:35 -0000 @@ -99,6 +99,7 @@ void *openpic_intr_establish(void *, int void openpic_intr_disestablish(void *, void *); void openpic_collect_preconf_intr(void); void openpic_ext_intr(void); +int openpic_ext_intr_handler(struct intrhand *, int, int *); /* Generic IRQ management routines. */ void openpic_gen_acknowledge_irq(int, int); @@ -420,7 +421,7 @@ openpic_intr_establish(void *lcv, int ir { struct intrhand *ih; struct intrq *iq; - int s; + int s, flags; if (!LEGAL_IRQ(irq) || type == IST_NONE) { printf("%s: bogus irq %d or type %d", __func__, irq, type); @@ -431,8 +432,8 @@ openpic_intr_establish(void *lcv, int ir ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK); if (ih == NULL) panic("%s: can't malloc handler info", __func__); - iq = &openpic_handler[irq]; + iq = &openpic_handler[irq]; switch (iq->iq_ist) { case IST_NONE: iq->iq_ist = type; @@ -451,9 +452,15 @@ openpic_intr_establish(void *lcv, int ir break; } + flags = level & IPL_MPSAFE; + level &= ~IPL_MPSAFE; + + KASSERT(level <= IPL_TTY || level >= IPL_CLOCK || flags & IPL_MPSAFE); + ih->ih_fun = ih_fun; ih->ih_arg = ih_arg; ih->ih_level = level; + ih->ih_flags = flags; ih->ih_irq = irq; evcount_attach(&ih->ih_count, name, &ih->ih_irq); @@ -647,10 +654,13 @@ openpic_ext_intr(void) #endif iq = &openpic_handler[irq]; - if (iq->iq_ipl <= ci->ci_cpl) +#ifdef OPENPIC_DEBUG + if (iq->iq_ipl <= pcpl) printf("invalid interrupt %d lvl %d at %d hw %d\n", - irq, iq->iq_ipl, ci->ci_cpl, + irq, iq->iq_ipl, pcpl, openpic_read(OPENPIC_CPU_PRIORITY(ci->ci_cpuid))); +#endif + if (iq->iq_ipl > maxipl) maxipl = iq->iq_ipl; openpic_splraise(iq->iq_ipl); @@ -659,14 +669,7 @@ openpic_ext_intr(void) spurious = 1; TAILQ_FOREACH(ih, &iq->iq_list, ih_list) { ppc_intr_enable(1); - KERNEL_LOCK(); - ret = (*ih->ih_fun)(ih->ih_arg); - if (ret) { - ih->ih_count.ec_count++; - spurious = 0; - } - KERNEL_UNLOCK(); - + ret = openpic_ext_intr_handler(ih, pcpl, &spurious); (void)ppc_intr_disable(); if (intr_shared_edge == 00 && ret == 1) break; @@ -684,6 +687,36 @@ openpic_ext_intr(void) openpic_splx(pcpl); /* Process pendings. */ openpic_irqnest[ci->ci_cpuid]--; +} + +int +openpic_ext_intr_handler(struct intrhand *ih, int pcpl, int *spurious) +{ + int ret; +#ifdef MULTIPROCESSOR + int need_lock; + + if (ih->ih_flags & IPL_MPSAFE) + need_lock = 0; + else + need_lock = pcpl < IPL_SCHED; + + if (need_lock) + KERNEL_LOCK(); +#endif + + ret = (*ih->ih_fun)(ih->ih_arg); + if (ret) { + ih->ih_count.ec_count++; + *spurious = 0; + } + +#ifdef MULTIPROCESSOR + if (need_lock) + KERNEL_UNLOCK(); +#endif + + return (ret); } void Index: macppc/dev/xlights.c =================================================================== RCS file: /cvs/src/sys/arch/macppc/dev/xlights.c,v retrieving revision 1.6 diff -u -p -r1.6 xlights.c --- macppc/dev/xlights.c 18 Nov 2013 20:21:51 -0000 1.6 +++ macppc/dev/xlights.c 16 Jun 2015 11:30:31 -0000 @@ -185,7 +185,7 @@ xlights_attach(struct device *parent, st } mac_intr_establish(parent, sc->sc_intr, intr[3] ? IST_LEVEL : - type, IPL_AUDIO, xlights_intr, sc, sc->sc_dev.dv_xname); + type, IPL_TTY, xlights_intr, sc, sc->sc_dev.dv_xname); out32rb(sc->sc_reg + I2S_FORMAT, CLKSRC_VS); macobio_enable(I2SClockOffset, I2S0CLKEN); Index: powerpc/include/intr.h =================================================================== RCS file: /cvs/src/sys/arch/powerpc/include/intr.h,v retrieving revision 1.50 diff -u -p -r1.50 intr.h --- powerpc/include/intr.h 4 Jan 2015 13:01:42 -0000 1.50 +++ powerpc/include/intr.h 16 Jun 2015 11:30:31 -0000 @@ -41,16 +41,16 @@ #define IPL_SOFTNET 3 #define IPL_SOFTTTY 4 #define IPL_BIO 5 -#define IPL_AUDIO IPL_BIO /* XXX - was defined this val in audio_if.h */ #define IPL_NET 6 #define IPL_TTY 7 #define IPL_VM 8 -#define IPL_CLOCK 9 -#define IPL_SCHED 10 -#define IPL_HIGH 11 -#define IPL_NUM 12 +#define IPL_AUDIO 9 +#define IPL_CLOCK 10 +#define IPL_SCHED 11 +#define IPL_HIGH 12 +#define IPL_NUM 13 -#define IPL_MPSAFE 0 /* no "mpsafe" interrupts */ +#define IPL_MPSAFE 0x100 #define IST_NONE 0 #define IST_PULSE 1 @@ -156,8 +156,6 @@ void softintr_init(void); void softintr_schedule(void *); void dosoftint(int); -#define set_sint(p) atomic_setbits_int(&curcpu()->ci_ipending, p) - #define setsoftclock() set_sint(SI_TO_IRQBIT(SI_SOFTCLOCK)) #define setsoftnet() set_sint(SI_TO_IRQBIT(SI_SOFTNET)) #define setsofttty() set_sint(SI_TO_IRQBIT(SI_SOFTTTY)) @@ -176,6 +174,7 @@ struct intrhand { struct evcount ih_count; int ih_type; int ih_level; + int ih_flags; int ih_irq; const char *ih_what; }; Index: socppc/dev/ipic.c =================================================================== RCS file: /cvs/src/sys/arch/socppc/dev/ipic.c,v retrieving revision 1.17 diff -u -p -r1.17 ipic.c --- socppc/dev/ipic.c 4 Jan 2015 13:01:42 -0000 1.17 +++ socppc/dev/ipic.c 16 Jun 2015 11:30:31 -0000 @@ -266,7 +266,7 @@ intr_establish(int ivec, int type, int l struct ipic_softc *sc = ipic_sc; struct intrhand *ih; struct intrq *iq; - int s; + int s, flags; if (ipic_preinit_done == 0) ipic_preinit(); @@ -286,9 +286,15 @@ intr_establish(int ivec, int type, int l ipic_calc_masks(); } + flags = level & IPL_MPSAFE; + level &= ~IPL_MPSAFE; + + KASSERT(level <= IPL_TTY || level >= IPL_CLOCK || flags & IPL_MPSAFE); + ih->ih_fun = ih_fun; ih->ih_arg = ih_arg; ih->ih_level = level; + ih->ih_flags = flags; ih->ih_irq = ivec; evcount_attach(&ih->ih_count, name, &ih->ih_irq);