Index: if_mcx.c =================================================================== RCS file: /cvs/src/sys/dev/pci/if_mcx.c,v retrieving revision 1.56 diff -u -p -r1.56 if_mcx.c --- if_mcx.c 17 Jun 2020 06:45:22 -0000 1.56 +++ if_mcx.c 26 Jun 2020 03:04:28 -0000 @@ -56,59 +56,60 @@ #define MCX_HCA_BAR PCI_MAPREG_START /* BAR 0 */ -#define MCX_FW_VER 0x0000 -#define MCX_FW_VER_MAJOR(_v) ((_v) & 0xffff) -#define MCX_FW_VER_MINOR(_v) ((_v) >> 16) -#define MCX_CMDIF_FW_SUBVER 0x0004 -#define MCX_FW_VER_SUBMINOR(_v) ((_v) & 0xffff) -#define MCX_CMDIF(_v) ((_v) >> 16) +#define MCX_FW_VER 0x0000 +#define MCX_FW_VER_MAJOR(_v) ((_v) & 0xffff) +#define MCX_FW_VER_MINOR(_v) ((_v) >> 16) +#define MCX_CMDIF_FW_SUBVER 0x0004 +#define MCX_FW_VER_SUBMINOR(_v) ((_v) & 0xffff) +#define MCX_CMDIF(_v) ((_v) >> 16) -#define MCX_ISSI 1 /* as per the PRM */ -#define MCX_CMD_IF_SUPPORTED 5 +#define MCX_ISSI 1 /* as per the PRM */ +#define MCX_CMD_IF_SUPPORTED 5 -#define MCX_HARDMTU 9500 +#define MCX_HARDMTU 9500 /* queue sizes */ -#define MCX_LOG_EQ_SIZE 6 /* one page */ -#define MCX_LOG_CQ_SIZE 12 -#define MCX_LOG_RQ_SIZE 10 -#define MCX_LOG_SQ_SIZE 11 +#define MCX_LOG_EQ_SIZE 6 /* one page */ +#define MCX_LOG_CQ_SIZE 12 +#define MCX_LOG_RQ_SIZE 10 +#define MCX_LOG_SQ_SIZE 11 /* completion event moderation - about 10khz, or 90% of the cq */ -#define MCX_CQ_MOD_PERIOD 50 -#define MCX_CQ_MOD_COUNTER (((1 << (MCX_LOG_CQ_SIZE - 1)) * 9) / 10) - -#define MCX_LOG_SQ_ENTRY_SIZE 6 -#define MCX_SQ_ENTRY_MAX_SLOTS 4 -#define MCX_SQ_SEGS_PER_SLOT \ +#define MCX_CQ_MOD_PERIOD 50 +#define MCX_CQ_MOD_COUNTER \ + (((1 << (MCX_LOG_CQ_SIZE - 1)) * 9) / 10) + +#define MCX_LOG_SQ_ENTRY_SIZE 6 +#define MCX_SQ_ENTRY_MAX_SLOTS 4 +#define MCX_SQ_SEGS_PER_SLOT \ (sizeof(struct mcx_sq_entry) / sizeof(struct mcx_sq_entry_seg)) -#define MCX_SQ_MAX_SEGMENTS \ +#define MCX_SQ_MAX_SEGMENTS \ 1 + ((MCX_SQ_ENTRY_MAX_SLOTS-1) * MCX_SQ_SEGS_PER_SLOT) -#define MCX_LOG_FLOW_TABLE_SIZE 5 -#define MCX_NUM_STATIC_FLOWS 4 /* promisc, allmulti, ucast, bcast */ -#define MCX_NUM_MCAST_FLOWS \ +#define MCX_LOG_FLOW_TABLE_SIZE 5 +#define MCX_NUM_STATIC_FLOWS 4 /* promisc, allmulti, ucast, bcast */ +#define MCX_NUM_MCAST_FLOWS \ ((1 << MCX_LOG_FLOW_TABLE_SIZE) - MCX_NUM_STATIC_FLOWS) -#define MCX_SQ_INLINE_SIZE 18 +#define MCX_SQ_INLINE_SIZE 18 CTASSERT(ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN == MCX_SQ_INLINE_SIZE); /* doorbell offsets */ -#define MCX_CQ_DOORBELL_OFFSET 0 -#define MCX_CQ_DOORBELL_SIZE 16 -#define MCX_RQ_DOORBELL_OFFSET 64 -#define MCX_SQ_DOORBELL_OFFSET 64 +#define MCX_CQ_DOORBELL_OFFSET 0 +#define MCX_CQ_DOORBELL_SIZE 16 +#define MCX_RQ_DOORBELL_OFFSET 64 +#define MCX_SQ_DOORBELL_OFFSET 64 -#define MCX_WQ_DOORBELL_MASK 0xffff +#define MCX_WQ_DOORBELL_MASK 0xffff /* uar registers */ -#define MCX_UAR_CQ_DOORBELL 0x20 -#define MCX_UAR_EQ_DOORBELL_ARM 0x40 -#define MCX_UAR_EQ_DOORBELL 0x48 -#define MCX_UAR_BF 0x800 +#define MCX_UAR_CQ_DOORBELL 0x20 +#define MCX_UAR_EQ_DOORBELL_ARM 0x40 +#define MCX_UAR_EQ_DOORBELL 0x48 +#define MCX_UAR_BF 0x800 -#define MCX_CMDQ_ADDR_HI 0x0010 -#define MCX_CMDQ_ADDR_LO 0x0014 +#define MCX_CMDQ_ADDR_HI 0x0010 +#define MCX_CMDQ_ADDR_LO 0x0014 #define MCX_CMDQ_ADDR_NMASK 0xfff #define MCX_CMDQ_LOG_SIZE(_v) ((_v) >> 4 & 0xf) #define MCX_CMDQ_LOG_STRIDE(_v) ((_v) >> 0 & 0xf) @@ -118,130 +119,113 @@ CTASSERT(ETHER_HDR_LEN + ETHER_VLAN_ENCA #define MCX_CMDQ_DOORBELL 0x0018 -#define MCX_STATE 0x01fc -#define MCX_STATE_MASK (1 << 31) -#define MCX_STATE_INITIALIZING (1 << 31) -#define MCX_STATE_READY (0 << 31) -#define MCX_STATE_INTERFACE_MASK (0x3 << 24) -#define MCX_STATE_INTERFACE_FULL_DRIVER (0x0 << 24) -#define MCX_STATE_INTERFACE_DISABLED (0x1 << 24) - -#define MCX_INTERNAL_TIMER 0x1000 -#define MCX_INTERNAL_TIMER_H 0x1000 -#define MCX_INTERNAL_TIMER_L 0x1004 - -#define MCX_CLEAR_INT 0x100c - -#define MCX_REG_OP_WRITE 0 -#define MCX_REG_OP_READ 1 - -#define MCX_REG_PMLP 0x5002 -#define MCX_REG_PMTU 0x5003 -#define MCX_REG_PTYS 0x5004 -#define MCX_REG_PAOS 0x5006 -#define MCX_REG_PFCC 0x5007 -#define MCX_REG_PPCNT 0x5008 -#define MCX_REG_MCIA 0x9014 - -#define MCX_ETHER_CAP_SGMII 0 -#define MCX_ETHER_CAP_1000_KX 1 -#define MCX_ETHER_CAP_10G_CX4 2 -#define MCX_ETHER_CAP_10G_KX4 3 -#define MCX_ETHER_CAP_10G_KR 4 -#define MCX_ETHER_CAP_40G_CR4 6 -#define MCX_ETHER_CAP_40G_KR4 7 -#define MCX_ETHER_CAP_10G_CR 12 -#define MCX_ETHER_CAP_10G_SR 13 -#define MCX_ETHER_CAP_10G_LR 14 -#define MCX_ETHER_CAP_40G_SR4 15 -#define MCX_ETHER_CAP_40G_LR4 16 -#define MCX_ETHER_CAP_50G_SR2 18 -#define MCX_ETHER_CAP_100G_CR4 20 -#define MCX_ETHER_CAP_100G_SR4 21 -#define MCX_ETHER_CAP_100G_KR4 22 -#define MCX_ETHER_CAP_25G_CR 27 -#define MCX_ETHER_CAP_25G_KR 28 -#define MCX_ETHER_CAP_25G_SR 29 -#define MCX_ETHER_CAP_50G_CR2 30 -#define MCX_ETHER_CAP_50G_KR2 31 - -#define MCX_PAGE_SHIFT 12 -#define MCX_PAGE_SIZE (1 << MCX_PAGE_SHIFT) -#define MCX_MAX_CQE 32 - -#define MCX_CMD_QUERY_HCA_CAP 0x100 -#define MCX_CMD_QUERY_ADAPTER 0x101 -#define MCX_CMD_INIT_HCA 0x102 -#define MCX_CMD_TEARDOWN_HCA 0x103 -#define MCX_CMD_ENABLE_HCA 0x104 -#define MCX_CMD_DISABLE_HCA 0x105 -#define MCX_CMD_QUERY_PAGES 0x107 -#define MCX_CMD_MANAGE_PAGES 0x108 -#define MCX_CMD_SET_HCA_CAP 0x109 -#define MCX_CMD_QUERY_ISSI 0x10a -#define MCX_CMD_SET_ISSI 0x10b -#define MCX_CMD_SET_DRIVER_VERSION \ - 0x10d -#define MCX_CMD_QUERY_SPECIAL_CONTEXTS \ - 0x203 -#define MCX_CMD_CREATE_EQ 0x301 -#define MCX_CMD_DESTROY_EQ 0x302 -#define MCX_CMD_CREATE_CQ 0x400 -#define MCX_CMD_DESTROY_CQ 0x401 -#define MCX_CMD_QUERY_NIC_VPORT_CONTEXT \ - 0x754 +#define MCX_STATE 0x01fc +#define MCX_STATE_MASK (1 << 31) +#define MCX_STATE_INITIALIZING (1 << 31) +#define MCX_STATE_READY (0 << 31) +#define MCX_STATE_INTERFACE_MASK (0x3 << 24) +#define MCX_STATE_INTERFACE_FULL_DRIVER (0x0 << 24) +#define MCX_STATE_INTERFACE_DISABLED (0x1 << 24) + +#define MCX_INTERNAL_TIMER 0x1000 +#define MCX_INTERNAL_TIMER_H 0x1000 +#define MCX_INTERNAL_TIMER_L 0x1004 + +#define MCX_CLEAR_INT 0x100c + +#define MCX_REG_OP_WRITE 0 +#define MCX_REG_OP_READ 1 + +#define MCX_REG_PMLP 0x5002 +#define MCX_REG_PMTU 0x5003 +#define MCX_REG_PTYS 0x5004 +#define MCX_REG_PAOS 0x5006 +#define MCX_REG_PFCC 0x5007 +#define MCX_REG_PPCNT 0x5008 +#define MCX_REG_MCIA 0x9014 + +#define MCX_ETHER_CAP_SGMII 0 +#define MCX_ETHER_CAP_1000_KX 1 +#define MCX_ETHER_CAP_10G_CX4 2 +#define MCX_ETHER_CAP_10G_KX4 3 +#define MCX_ETHER_CAP_10G_KR 4 +#define MCX_ETHER_CAP_40G_CR4 6 +#define MCX_ETHER_CAP_40G_KR4 7 +#define MCX_ETHER_CAP_10G_CR 12 +#define MCX_ETHER_CAP_10G_SR 13 +#define MCX_ETHER_CAP_10G_LR 14 +#define MCX_ETHER_CAP_40G_SR4 15 +#define MCX_ETHER_CAP_40G_LR4 16 +#define MCX_ETHER_CAP_50G_SR2 18 +#define MCX_ETHER_CAP_100G_CR4 20 +#define MCX_ETHER_CAP_100G_SR4 21 +#define MCX_ETHER_CAP_100G_KR4 22 +#define MCX_ETHER_CAP_25G_CR 27 +#define MCX_ETHER_CAP_25G_KR 28 +#define MCX_ETHER_CAP_25G_SR 29 +#define MCX_ETHER_CAP_50G_CR2 30 +#define MCX_ETHER_CAP_50G_KR2 31 + +#define MCX_PAGE_SHIFT 12 +#define MCX_PAGE_SIZE (1 << MCX_PAGE_SHIFT) +#define MCX_MAX_CQE 32 + +#define MCX_CMD_QUERY_HCA_CAP 0x100 +#define MCX_CMD_QUERY_ADAPTER 0x101 +#define MCX_CMD_INIT_HCA 0x102 +#define MCX_CMD_TEARDOWN_HCA 0x103 +#define MCX_CMD_ENABLE_HCA 0x104 +#define MCX_CMD_DISABLE_HCA 0x105 +#define MCX_CMD_QUERY_PAGES 0x107 +#define MCX_CMD_MANAGE_PAGES 0x108 +#define MCX_CMD_SET_HCA_CAP 0x109 +#define MCX_CMD_QUERY_ISSI 0x10a +#define MCX_CMD_SET_ISSI 0x10b +#define MCX_CMD_SET_DRIVER_VERSION 0x10d +#define MCX_CMD_QUERY_SPECIAL_CONTEXTS 0x203 +#define MCX_CMD_CREATE_EQ 0x301 +#define MCX_CMD_DESTROY_EQ 0x302 +#define MCX_CMD_CREATE_CQ 0x400 +#define MCX_CMD_DESTROY_CQ 0x401 +#define MCX_CMD_QUERY_NIC_VPORT_CONTEXT 0x754 #define MCX_CMD_MODIFY_NIC_VPORT_CONTEXT \ - 0x755 -#define MCX_CMD_QUERY_VPORT_COUNTERS \ - 0x770 -#define MCX_CMD_ALLOC_PD 0x800 -#define MCX_CMD_ALLOC_UAR 0x802 -#define MCX_CMD_ACCESS_REG 0x805 -#define MCX_CMD_ALLOC_TRANSPORT_DOMAIN \ - 0x816 -#define MCX_CMD_CREATE_TIR 0x900 -#define MCX_CMD_DESTROY_TIR 0x902 -#define MCX_CMD_CREATE_SQ 0x904 -#define MCX_CMD_MODIFY_SQ 0x905 -#define MCX_CMD_DESTROY_SQ 0x906 -#define MCX_CMD_QUERY_SQ 0x907 -#define MCX_CMD_CREATE_RQ 0x908 -#define MCX_CMD_MODIFY_RQ 0x909 -#define MCX_CMD_DESTROY_RQ 0x90a -#define MCX_CMD_QUERY_RQ 0x90b -#define MCX_CMD_CREATE_TIS 0x912 -#define MCX_CMD_DESTROY_TIS 0x914 -#define MCX_CMD_SET_FLOW_TABLE_ROOT \ - 0x92f -#define MCX_CMD_CREATE_FLOW_TABLE \ - 0x930 -#define MCX_CMD_DESTROY_FLOW_TABLE \ - 0x931 -#define MCX_CMD_QUERY_FLOW_TABLE \ - 0x932 -#define MCX_CMD_CREATE_FLOW_GROUP \ - 0x933 -#define MCX_CMD_DESTROY_FLOW_GROUP \ - 0x934 -#define MCX_CMD_QUERY_FLOW_GROUP \ - 0x935 -#define MCX_CMD_SET_FLOW_TABLE_ENTRY \ - 0x936 -#define MCX_CMD_QUERY_FLOW_TABLE_ENTRY \ - 0x937 -#define MCX_CMD_DELETE_FLOW_TABLE_ENTRY \ - 0x938 -#define MCX_CMD_ALLOC_FLOW_COUNTER \ - 0x939 -#define MCX_CMD_QUERY_FLOW_COUNTER \ - 0x93b - -#define MCX_QUEUE_STATE_RST 0 -#define MCX_QUEUE_STATE_RDY 1 -#define MCX_QUEUE_STATE_ERR 3 + 0x755 +#define MCX_CMD_QUERY_VPORT_COUNTERS 0x770 +#define MCX_CMD_ALLOC_PD 0x800 +#define MCX_CMD_ALLOC_UAR 0x802 +#define MCX_CMD_ACCESS_REG 0x805 +#define MCX_CMD_ALLOC_TRANSPORT_DOMAIN 0x816 +#define MCX_CMD_CREATE_TIR 0x900 +#define MCX_CMD_DESTROY_TIR 0x902 +#define MCX_CMD_CREATE_SQ 0x904 +#define MCX_CMD_MODIFY_SQ 0x905 +#define MCX_CMD_DESTROY_SQ 0x906 +#define MCX_CMD_QUERY_SQ 0x907 +#define MCX_CMD_CREATE_RQ 0x908 +#define MCX_CMD_MODIFY_RQ 0x909 +#define MCX_CMD_DESTROY_RQ 0x90a +#define MCX_CMD_QUERY_RQ 0x90b +#define MCX_CMD_CREATE_TIS 0x912 +#define MCX_CMD_DESTROY_TIS 0x914 +#define MCX_CMD_SET_FLOW_TABLE_ROOT 0x92f +#define MCX_CMD_CREATE_FLOW_TABLE 0x930 +#define MCX_CMD_DESTROY_FLOW_TABLE 0x931 +#define MCX_CMD_QUERY_FLOW_TABLE 0x932 +#define MCX_CMD_CREATE_FLOW_GROUP 0x933 +#define MCX_CMD_DESTROY_FLOW_GROUP 0x934 +#define MCX_CMD_QUERY_FLOW_GROUP 0x935 +#define MCX_CMD_SET_FLOW_TABLE_ENTRY 0x936 +#define MCX_CMD_QUERY_FLOW_TABLE_ENTRY 0x937 +#define MCX_CMD_DELETE_FLOW_TABLE_ENTRY 0x938 +#define MCX_CMD_ALLOC_FLOW_COUNTER 0x939 +#define MCX_CMD_QUERY_FLOW_COUNTER 0x93b + +#define MCX_QUEUE_STATE_RST 0 +#define MCX_QUEUE_STATE_RDY 1 +#define MCX_QUEUE_STATE_ERR 3 -#define MCX_FLOW_TABLE_TYPE_RX 0 -#define MCX_FLOW_TABLE_TYPE_TX 1 +#define MCX_FLOW_TABLE_TYPE_RX 0 +#define MCX_FLOW_TABLE_TYPE_TX 1 #define MCX_CMDQ_INLINE_DATASIZE 16