Index: dev/dino.c
===================================================================
RCS file: /cvs/src/sys/arch/hppa/dev/dino.c,v
retrieving revision 1.31
diff -u -p -r1.31 dino.c
--- dev/dino.c	29 Mar 2014 18:09:29 -0000	1.31
+++ dev/dino.c	27 Sep 2014 21:52:03 -0000
@@ -340,12 +340,12 @@ dino_conf_read(void *v, pcitag_t tag, in
 	r->pamr = 0;
 
 	r->pci_addr = tag | reg;
-	data = r->pci_conf_data;
+	data = lemtoh32(&r->pci_conf_data);
 
 	/* restore arbitration */
 	r->pamr = pamr;
 
-	return (letoh32(data));
+	return (data);
 }
 
 void
@@ -703,20 +703,20 @@ dino_r2(void *v, bus_space_handle_t h, b
 u_int32_t
 dino_r4(void *v, bus_space_handle_t h, bus_size_t o)
 {
-	u_int32_t data;
+	volatile u_int32_t *data;
 
 	h += o;
 	if (h & 0xf0000000)
-		data = *(volatile u_int32_t *)h;
+		data = (volatile u_int32_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 
 		r->pci_addr = h;
-		data = r->pci_io_data;
+		data = &r->pci_io_data;
 	}
 
-	return (letoh32(data));
+	return (lemtoh32(data));
 }
 
 u_int64_t
Index: include/endian.h
===================================================================
RCS file: /cvs/src/sys/arch/hppa/include/endian.h,v
retrieving revision 1.12
diff -u -p -r1.12 endian.h
--- include/endian.h	12 Jul 2014 16:25:08 -0000	1.12
+++ include/endian.h	27 Sep 2014 21:52:04 -0000
@@ -30,6 +30,121 @@
 #define	_MACHINE_ENDIAN_H_
 
 #define	_BYTE_ORDER _BIG_ENDIAN
+
+#ifdef _KERNEL
+
+#include <machine/psl.h>
+
+static inline __uint16_t
+__mswap16(volatile __uint16_t *m)
+{
+	unsigned int psw, pswe = PSL_E;
+	__uint16_t v;
+
+	asm(
+	"mfctl	%%ipsw, %0\n\t"
+	"or	%1, %0, %1\n\t"
+	"mtctl	%1, %%ipsw\n\t"
+	"ldh	%3, %2\n\t"
+	"mtctl	%0, %%ipsw"
+	    : "=&r" (psw), "+r" (pswe), "=r" (v)
+            : "m" (*m));
+
+	return (v);
+}
+
+static inline __uint32_t
+__mswap32(volatile __uint32_t *m)
+{
+	unsigned int psw, pswe = PSL_E;
+	__uint32_t v;
+
+	asm(
+	"mfctl	%%ipsw, %0\n\t"
+	"or	%1, %0, %1\n\t"
+	"mtctl	%1, %%ipsw\n\t"
+	"ldw	%3, %2\n\t"
+	"mtctl	%0, %%ipsw"
+	    : "=&r" (psw), "+r" (pswe), "=r" (v)
+	    : "m" (*m));
+
+	return (v);
+}
+
+static inline __uint64_t
+__mswap64(volatile __uint64_t *m)
+{
+	__uint32_t *a = (__uint32_t *)m;
+	__uint64_t v;
+
+	v = (__uint64_t)__mswap32(a + 1) << 32 |
+	    (__uint64_t)__mswap32(a);
+
+	return (v);
+}
+
+static inline void
+__swapm16(volatile __uint16_t *m, __uint16_t v)
+{
+	unsigned int psw, pswe = PSL_E;
+
+	asm(
+	"mfctl	%%ipsw, %0\n\t"
+	"or	%1, %0, %1\n\t"
+	"mtctl	%1, %%ipsw\n\t"
+	"sth	%3, 0(%4)\n\t"
+	"mtctl	%0, %%ipsw"
+	    : "=&r" (psw), "+r" (pswe), "=m" (*m)
+	    : "r" (v), "r" (m));
+}
+
+static inline void
+__swapm32(volatile __uint32_t *m, __uint32_t v)
+{
+	unsigned int psw, pswe = PSL_E;
+
+	asm(
+	"mfctl	%%ipsw, %0\n\t"
+	"or	%1, %0, %1\n\t"
+	"mtctl	%1, %%ipsw\n\t"
+	"stw	%3, 0(%4)\n\t"
+	"mtctl	%0, %%ipsw"
+	    : "=&r" (psw), "+r" (pswe), "=m" (*m)
+	    : "r" (v), "r" (m));
+}
+
+static inline void
+__swapm64(volatile __uint64_t *m, __uint64_t v)
+{
+#if 0
+	unsigned int psw, pswe = PSL_E;
+
+	__uint32_t *mm = (__uint32_t *)m;
+	__uint32_t *vv = (__uint32_t *)&v;
+
+	asm(
+	"mfctl	%%ipsw, %0\n\t"
+	"or	%1, %0, %1\n\t"
+	"mtctl	%1, %%ipsw\n\t"
+	"stw	%4, 0(%6)\n\t"
+	"stw	%5, 4(%6)\n\t"
+	"mtctl	%0, %%ipsw"
+	    : "=&r" (psw), "+r" (pswe), "=m" (*m)
+            : "r" (vv[0]), "r" (vv[1]), "r" (m));
+#else
+	__uint32_t *a = (__uint32_t *)m;
+
+	__swapm32(a + 1, v >> 32);
+	__swapm32(a, v);
+#endif
+}
+
+#undef __ASI_P_L
+
+#define __HAVE_MD_SWAPIO
+
+#endif /* _KERNEL */
+
 #define	__STRICT_ALIGNMENT
 
 #ifndef __FROM_SYS__ENDIAN