Index: if_bnx.c =================================================================== RCS file: /cvs/src/sys/dev/pci/if_bnx.c,v retrieving revision 1.107 diff -u -p -r1.107 if_bnx.c --- if_bnx.c 18 Jul 2014 07:11:04 -0000 1.107 +++ if_bnx.c 13 Aug 2014 10:40:24 -0000 @@ -848,6 +848,8 @@ bnx_attachhook(void *xsc) sc->bnx_rx_ticks = 18; #endif + sc->mbuf_alloc_size = BNX_MAX_JUMBO_MRU; + /* Update statistics once every second. */ sc->bnx_stats_ticks = 1000000 & 0xffff00; @@ -878,6 +880,7 @@ bnx_attachhook(void *xsc) ifp->if_ioctl = bnx_ioctl; ifp->if_start = bnx_start; ifp->if_watchdog = bnx_watchdog; + ifp->if_hardmtu = BNX_MAX_JUMBO_MTU; IFQ_SET_MAXLEN(&ifp->if_snd, USABLE_TX_BD - 1); IFQ_SET_READY(&ifp->if_snd); bcopy(sc->eaddr, sc->arpcom.ac_enaddr, ETHER_ADDR_LEN); @@ -890,8 +893,6 @@ bnx_attachhook(void *xsc) ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING; #endif - sc->mbuf_alloc_size = BNX_MAX_MRU; - printf("%s: address %s\n", sc->bnx_dev.dv_xname, ether_sprintf(sc->arpcom.ac_enaddr)); @@ -2647,8 +2648,8 @@ bnx_dma_alloc(struct bnx_softc *sc) * Create DMA maps for the Rx buffer mbufs. */ for (i = 0; i < TOTAL_RX_BD; i++) { - if (bus_dmamap_create(sc->bnx_dmatag, BNX_MAX_MRU, - BNX_MAX_SEGMENTS, BNX_MAX_MRU, 0, BUS_DMA_NOWAIT, + if (bus_dmamap_create(sc->bnx_dmatag, sc->mbuf_alloc_size, + 1, sc->mbuf_alloc_size, 0, BUS_DMA_NOWAIT, &sc->rx_mbuf_map[i])) { printf(": Could not create Rx mbuf %d DMA map!\n", i); rc = ENOMEM; @@ -3663,10 +3664,10 @@ bnx_get_buf(struct bnx_softc *sc, u_int1 *prod_bseq); /* This is a new mbuf allocation. */ - m = MCLGETI(NULL, M_DONTWAIT, NULL, MCLBYTES); + m = MCLGETI(NULL, M_DONTWAIT, NULL, sc->mbuf_alloc_size); if (!m) return (0); - m->m_len = m->m_pkthdr.len = MCLBYTES; + m->m_len = m->m_pkthdr.len = sc->mbuf_alloc_size; /* the chip aligns the ip header for us, no need to m_adj */ /* Map the mbuf cluster into device memory. */ @@ -3979,6 +3980,16 @@ bnx_init_rx_context(struct bnx_softc *sc REG_WR(sc, BNX_MQ_MAP_L2_5, val | BNX_MQ_MAP_L2_5_ARM); } + CTX_WR(sc, GET_CID_ADDR(RX_CID), BNX_L2CTX_RX_PG_BUF_SIZE, 0); + + /* Configure the rx_bd and page chain mbuf cluster size. */ + val = (sc->mbuf_alloc_size << 16); + CTX_WR(sc, GET_CID_ADDR(RX_CID), BNX_L2CTX_RX_PG_BUF_SIZE, val); + + /* Configure the context reserved for jumbo support. */ + CTX_WR(sc, GET_CID_ADDR(RX_CID), BNX_L2CTX_RX_RBDC_KEY, + BNX_L2CTX_RX_RBDC_JUMBO_KEY); + /* Point the hardware to the first page in the chain. */ val = (u_int32_t)((u_int64_t)sc->rx_bd_chain_paddr[0] >> 32); CTX_WR(sc, GET_CID_ADDR(RX_CID), BNX_L2CTX_NX_BDHADDR_HI, val); @@ -4746,7 +4757,7 @@ bnx_init(void *xsc) bnx_set_mac_addr(sc); /* Calculate and program the Ethernet MRU size. */ - ether_mtu = BNX_MAX_STD_ETHER_MTU_VLAN; + ether_mtu = BNX_MAX_JUMBO_ETHER_MTU; DBPRINT(sc, BNX_INFO, "%s(): setting MRU = %d\n", __FUNCTION__, ether_mtu); @@ -5134,7 +5145,7 @@ bnx_ioctl(struct ifnet *ifp, u_long comm case SIOCGIFRXR: error = if_rxr_ioctl((struct if_rxrinfo *)ifr->ifr_data, - NULL, MCLBYTES, &sc->rx_ring); + NULL, sc->mbuf_alloc_size, &sc->rx_ring); break; default: