Index: if_aq_pci.c =================================================================== RCS file: /cvs/src/sys/dev/pci/if_aq_pci.c,v retrieving revision 1.1 diff -u -p -r1.1 if_aq_pci.c --- if_aq_pci.c 2 Sep 2021 10:11:21 -0000 1.1 +++ if_aq_pci.c 6 Sep 2021 11:56:29 -0000 @@ -2096,6 +2096,8 @@ aq_rx_fill_slots(struct aq_softc *sc, st } as->as_m = m; + bus_dmamap_sync(sc->sc_dmat, as->as_map, 0, + as->as_map->dm_mapsize, BUS_DMASYNC_PREREAD); htolem64(&rd->buf_addr, as->as_map->dm_segs[0].ds_addr); rd->hdr_addr = 0; p++; @@ -2197,6 +2199,10 @@ aq_rxeof(struct aq_softc *sc, struct aq_ if (idx == AQ_RXD_NUM) idx = 0; } + + bus_dmamap_sync(sc->sc_dmat, AQ_DMA_MAP(&rx->rx_mem), 0, + AQ_DMA_LEN(&rx->rx_mem), BUS_DMASYNC_PREREAD); + rx->rx_cons = idx; if (rxfree > 0) { @@ -2230,6 +2236,8 @@ aq_txeof(struct aq_softc *sc, struct aq_ while (idx != end) { as = &tx->tx_slots[idx]; + bus_dmamap_sync(sc->sc_dmat, as->as_map, 0, + as->as_map->dm_mapsize, BUS_DMASYNC_POSTWRITE); bus_dmamap_unload(sc->sc_dmat, as->as_map); m_freem(as->as_m); @@ -2241,6 +2249,9 @@ aq_txeof(struct aq_softc *sc, struct aq_ free++; } + bus_dmamap_sync(sc->sc_dmat, AQ_DMA_MAP(&tx->tx_mem), 0, + AQ_DMA_LEN(&tx->tx_mem), BUS_DMASYNC_PREREAD); + tx->tx_cons = idx; if (free != 0) { @@ -2438,6 +2449,14 @@ aq_queue_up(struct aq_softc *sc, struct goto destroy_tx_slots; } + bus_dmamap_sync(sc->sc_dmat, AQ_DMA_MAP(&tx->tx_mem), + 0, AQ_DMA_LEN(&tx->tx_mem), + BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); + + bus_dmamap_sync(sc->sc_dmat, AQ_DMA_MAP(&rx->rx_mem), + 0, AQ_DMA_LEN(&rx->rx_mem), + BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); + aq_txring_reset(sc, tx, 1); aq_rxring_reset(sc, rx, 1); return 0; @@ -2468,6 +2487,10 @@ aq_queue_down(struct aq_softc *sc, struc tx->tx_slots = NULL; } + bus_dmamap_sync(sc->sc_dmat, AQ_DMA_MAP(&tx->tx_mem), + 0, AQ_DMA_LEN(&tx->tx_mem), + BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); + aq_dmamem_free(sc, &tx->tx_mem); rx = &aq->q_rx; @@ -2476,6 +2499,10 @@ aq_queue_down(struct aq_softc *sc, struc aq_free_slots(sc, rx->rx_slots, AQ_RXD_NUM, AQ_RXD_NUM); rx->rx_slots = NULL; } + + bus_dmamap_sync(sc->sc_dmat, AQ_DMA_MAP(&rx->rx_mem), + 0, AQ_DMA_LEN(&rx->rx_mem), + BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); aq_dmamem_free(sc, &rx->rx_mem); }