? cscope.out ? arch/arm64/compile/GENERIC/obj ? arch/arm64/compile/GENERIC.MP/obj ? arch/arm64/stand/efiboot/obj ? dev/fdt/usbphy.c ? dev/fdt/usbphy.h Index: arch/arm64/conf/GENERIC =================================================================== RCS file: /cvs/src/sys/arch/arm64/conf/GENERIC,v retrieving revision 1.193 diff -u -p -r1.193 GENERIC --- arch/arm64/conf/GENERIC 8 Mar 2021 20:56:10 -0000 1.193 +++ arch/arm64/conf/GENERIC 7 Apr 2021 03:04:52 -0000 @@ -136,6 +136,8 @@ aplintc* at fdt? early 1 aplpcie* at fdt? pci* at aplpcie? exuart* at fdt? +aplns* at fdt? # Apple NVME Storage controllers +nvme* at aplns? # iMX imxccm* at fdt? early 1 Index: arch/arm64/conf/files.arm64 =================================================================== RCS file: /cvs/src/sys/arch/arm64/conf/files.arm64,v retrieving revision 1.38 diff -u -p -r1.38 files.arm64 --- arch/arm64/conf/files.arm64 28 Feb 2021 21:40:11 -0000 1.38 +++ arch/arm64/conf/files.arm64 7 Apr 2021 03:04:52 -0000 @@ -152,6 +152,12 @@ device aplpcie: pcibus attach aplpcie at fdt file arch/arm64/dev/aplpcie.c aplpcie +# Apple NVME Storage +device aplns {} +attach aplns at fdt +attach nvme at aplns with nvme_ans +file arch/arm64/dev/aplns.c aplns | nvme_ans + device bcmintc attach bcmintc at fdt file arch/arm64/dev/bcm2836_intr.c bcmintc Index: arch/arm64/dev/aplns.c =================================================================== RCS file: arch/arm64/dev/aplns.c diff -N arch/arm64/dev/aplns.c --- /dev/null 1 Jan 1970 00:00:00 -0000 +++ arch/arm64/dev/aplns.c 7 Apr 2021 03:04:52 -0000 @@ -0,0 +1,160 @@ +/* $OpenBSD$ */ +/* + * Copyright (c) 2014, 2021 David Gwynne + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include +#include + +#include +#include + +int aplns_match(struct device *, void *, void *); +void aplns_attach(struct device *, struct device *, void *); + +struct cfattach aplns_ca = { + sizeof(struct device), + aplns_match, + aplns_attach +}; + +struct cfdriver aplns_cd = { + NULL, "aplns", DV_DULL +}; + +int +aplns_match(struct device *parent, void *match, void *aux) +{ + struct fdt_attach_args *faa = aux; + + return (OF_is_compatible(faa->fa_node, "apple,nvme-m1")); +} + +void +aplns_attach(struct device *parent, struct device *self, void *aux) +{ + struct fdt_attach_args *faa = aux; + + printf("\n"); + + config_found(self, faa, NULL); +} + +struct nvme_ans_softc { + struct nvme_softc asc_nvme; +}; + +int nvme_ans_match(struct device *, void *, void *); +void nvme_ans_attach(struct device *, struct device *, void *); + +struct cfattach nvme_ans_ca = { + sizeof(struct nvme_ans_softc), + nvme_ans_match, + nvme_ans_attach, +}; + +uint32_t nvme_ans_q_slot(struct nvme_softc *, + struct nvme_queue *, struct nvme_ccb *); +void nvme_ans_q_post(struct nvme_softc *, + struct nvme_queue *, struct nvme_ccb *); + + +static const struct nvme_ops nvme_ans_ops = { + .op_q_slot = nvme_ans_q_slot, + .op_q_post = nvme_ans_q_post, +}; + +int +nvme_ans_match(struct device *parent, void *match, void *aux) +{ + struct fdt_attach_args *faa = aux; + + return (OF_is_compatible(faa->fa_node, "apple,nvme-m1")); +} + +void +nvme_ans_attach(struct device *parent, struct device *self, void *aux) +{ + struct nvme_ans_softc *asc = (struct nvme_ans_softc *)self; + struct nvme_softc *sc = &asc->asc_nvme; + struct fdt_attach_args *faa = aux; + + if (bus_space_map(faa->fa_iot, + faa->fa_reg[0].addr, faa->fa_reg[0].size, + 0, &sc->sc_ioh) != 0) { + printf(": unable to map registers\n"); + return; + } + + sc->sc_ih = fdt_intr_establish(faa->fa_node, IPL_BIO, + nvme_intr, sc, sc->sc_dev.dv_xname); + if (sc->sc_ih == NULL) { + printf(": unable to establish interrupt\n"); + goto unmap; + } + + sc->sc_dmat = faa->fa_dmat; + sc->sc_iot = faa->fa_iot; + sc->sc_ios = faa->fa_reg[0].size; + sc->sc_ops = &nvme_ans_ops; + + printf(":"); + if (nvme_attach(sc) != 0) { + /* error printed by nvme_attach() */ + goto disestablish; + } + + return; + +disestablish: + fdt_intr_disestablish(sc->sc_ih); + sc->sc_ih = NULL; + +unmap: + bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); + sc->sc_ios = 0; +} + +uint32_t +nvme_ans_q_slot(struct nvme_softc *sc, + struct nvme_queue *q, struct nvme_ccb *ccb) +{ + return (ccb->ccb_id); +} + +void +nvme_ans_q_post(struct nvme_softc *sc, + struct nvme_queue *q, struct nvme_ccb *ccb) +{ + nvme_write4(sc, q->q_sqtdbl, ccb->ccb_id); +} Index: dev/ic/nvme.c =================================================================== RCS file: /cvs/src/sys/dev/ic/nvme.c,v retrieving revision 1.91 diff -u -p -r1.91 nvme.c --- dev/ic/nvme.c 25 Feb 2021 07:30:36 -0000 1.91 +++ dev/ic/nvme.c 7 Apr 2021 03:04:53 -0000 @@ -117,10 +117,16 @@ void nvme_scsi_inquiry(struct scsi_xfer void nvme_scsi_capacity16(struct scsi_xfer *); void nvme_scsi_capacity(struct scsi_xfer *); -#define nvme_read4(_s, _r) \ - bus_space_read_4((_s)->sc_iot, (_s)->sc_ioh, (_r)) -#define nvme_write4(_s, _r, _v) \ - bus_space_write_4((_s)->sc_iot, (_s)->sc_ioh, (_r), (_v)) +uint32_t nvme_op_q_slot(struct nvme_softc *, + struct nvme_queue *, struct nvme_ccb *); +void nvme_op_q_post(struct nvme_softc *, + struct nvme_queue *, struct nvme_ccb *); + +static const struct nvme_ops nvme_ops = { + .op_q_slot = nvme_op_q_slot, + .op_q_post = nvme_op_q_post, +}; + /* * Some controllers, at least Apple NVMe, always require split * transfers, so don't use bus_space_{read,write}_8() on LP64. @@ -280,6 +286,8 @@ nvme_attach(struct nvme_softc *sc) mtx_init(&sc->sc_ccb_mtx, IPL_BIO); SIMPLEQ_INIT(&sc->sc_ccb_list); scsi_iopool_init(&sc->sc_iopool, sc, nvme_ccb_get, nvme_ccb_put); + if (sc->sc_ops == NULL) + sc->sc_ops = &nvme_ops; reg = nvme_read4(sc, NVME_VS); if (reg == 0xffffffff) { @@ -879,6 +887,27 @@ nvme_scsi_free(struct scsi_link *link) free(identify, M_DEVBUF, sizeof(*identify)); } +uint32_t +nvme_op_q_slot(struct nvme_softc *sc, + struct nvme_queue *q, struct nvme_ccb *ccb) +{ + return (q->q_sq_tail); +} + +void +nvme_op_q_post(struct nvme_softc *sc, + struct nvme_queue *q, struct nvme_ccb *ccb) +{ + uint32_t tail; + + tail = ++q->q_sq_tail; + if (tail >= q->q_entries) + tail = 0; + q->q_sq_tail = tail; + + nvme_write4(sc, q->q_sqtdbl, tail); +} + void nvme_q_submit(struct nvme_softc *sc, struct nvme_queue *q, struct nvme_ccb *ccb, void (*fill)(struct nvme_softc *, struct nvme_ccb *, void *)) @@ -887,9 +916,7 @@ nvme_q_submit(struct nvme_softc *sc, str u_int32_t tail; mtx_enter(&q->q_sq_mtx); - tail = q->q_sq_tail; - if (++q->q_sq_tail >= q->q_entries) - q->q_sq_tail = 0; + tail = sc->sc_ops->op_q_slot(sc, q, ccb); sqe += tail; @@ -901,7 +928,7 @@ nvme_q_submit(struct nvme_softc *sc, str bus_dmamap_sync(sc->sc_dmat, NVME_DMA_MAP(q->q_sq_dmamem), sizeof(*sqe) * tail, sizeof(*sqe), BUS_DMASYNC_PREWRITE); - nvme_write4(sc, q->q_sqtdbl, q->q_sq_tail); + sc->sc_ops->op_q_post(sc, q, ccb); mtx_leave(&q->q_sq_mtx); } Index: dev/ic/nvmevar.h =================================================================== RCS file: /cvs/src/sys/dev/ic/nvmevar.h,v retrieving revision 1.20 diff -u -p -r1.20 nvmevar.h --- dev/ic/nvmevar.h 22 Jul 2020 13:16:04 -0000 1.20 +++ dev/ic/nvmevar.h 7 Apr 2021 03:04:53 -0000 @@ -69,9 +69,18 @@ struct nvme_namespace { struct nvm_identify_namespace *ident; }; +struct nvme_ops { + uint32_t (*op_q_slot)(struct nvme_softc *, + struct nvme_queue *, struct nvme_ccb *); + void (*op_q_post)(struct nvme_softc *, + struct nvme_queue *, struct nvme_ccb *); +}; + struct nvme_softc { struct device sc_dev; + const struct nvme_ops *sc_ops; + bus_space_tag_t sc_iot; bus_space_handle_t sc_ioh; bus_size_t sc_ios; @@ -108,3 +117,8 @@ int nvme_intr(void *); int nvme_intr_intx(void *); #define DEVNAME(_sc) ((_sc)->sc_dev.dv_xname) + +#define nvme_read4(_s, _r) \ + bus_space_read_4((_s)->sc_iot, (_s)->sc_ioh, (_r)) +#define nvme_write4(_s, _r, _v) \ + bus_space_write_4((_s)->sc_iot, (_s)->sc_ioh, (_r), (_v))