? conf/DEBUG.MP
? pci/tsciic.c
Index: alpha/lock_machdep.c
===================================================================
RCS file: /cvs/src/sys/arch/alpha/alpha/lock_machdep.c,v
retrieving revision 1.2
diff -u -p -r1.2 lock_machdep.c
--- alpha/lock_machdep.c	11 Feb 2015 01:10:48 -0000	1.2
+++ alpha/lock_machdep.c	11 Feb 2015 03:43:32 -0000
@@ -18,30 +18,51 @@
 
 
 #include <sys/param.h>
-#include <sys/lock.h>
 #include <sys/systm.h>
 
 #include <machine/atomic.h>
 #include <machine/cpu.h>
 #include <machine/lock.h>
 
-#include <ddb/db_output.h>
-
-void
-__mp_lock_init(struct __mp_lock *lock)
-{
-	lock->mpl_cpu = NULL;
-	lock->mpl_count = 0;
-}
-
 #if defined(MP_LOCKDEBUG)
 #ifndef DDB
 #error "MP_LOCKDEBUG requires DDB"
 #endif
+#include <ddb/db_output.h>
 
 /* CPU-dependent timing, needs this to be settable from ddb. */
 extern int __mp_lock_spinout;
 #endif
+
+static inline int
+__cpu_cas(volatile unsigned long *addr, unsigned long old, unsigned long new)
+{
+	unsigned long t0, v0;
+
+	__asm volatile(
+		"1:	ldq_l	%1, 0(%2)	\n"	/* v0 = *addr */
+		"	cmpeq	%1, %3, %0	\n"	/* t0 = v0 == old */
+		"	beq	%0, 2f		\n"
+		"	mov	%4, %0		\n"	/* t0 = new */
+		"	stq_c	%0, 0(%2)	\n"	/* *addr = new */
+		"	beq	%0, 3f		\n"
+		"	mb			\n"
+		"2:	br	4f		\n"
+		"3:	br	1b		\n"	/* update failed */
+		"4:				\n"
+		: "=&r" (t0), "=&r" (v0)
+		: "r" (addr), "r" (old), "r" (new)
+		: "memory");
+
+	return (v0 != old);
+}
+
+void
+__mp_lock_init(struct __mp_lock *lock)
+{
+	lock->mpl_cpu = NULL;
+	lock->mpl_count = 0;
+}
 
 static inline void
 __mp_lock_spin(struct __mp_lock *mpl)
Index: include/lock.h
===================================================================
RCS file: /cvs/src/sys/arch/alpha/include/lock.h,v
retrieving revision 1.8
diff -u -p -r1.8 lock.h
--- include/lock.h	11 Feb 2015 00:14:11 -0000	1.8
+++ include/lock.h	11 Feb 2015 03:43:32 -0000
@@ -61,27 +61,4 @@ do {									\
 } while (0)
 #endif /* MULTIPROCESSOR */
 
-static inline int
-__cpu_cas(volatile unsigned long *addr, unsigned long old, unsigned long new)
-{
-	unsigned long t0, v0;
-
-	__asm volatile(
-		"1:	ldq_l	%1, 0(%2)	\n"	/* v0 = *addr */
-		"	cmpeq	%1, %3, %0	\n"	/* t0 = v0 == old */
-		"	beq	%0, 2f		\n"
-		"	mov	%4, %0		\n"	/* t0 = new */
-		"	stq_c	%0, 0(%2)	\n"	/* *addr = new */
-		"	beq	%0, 3f		\n"
-		"	mb			\n"
-		"2:	br	4f		\n"
-		"3:	br	1b		\n"	/* update failed */
-		"4:				\n"
-		: "=&r" (t0), "=&r" (v0)
-		: "r" (addr), "r" (old), "r" (new)
-		: "memory");
-
-	return (v0 != old);
-}
-
 #endif /* _MACHINE_LOCK_H_ */