Index: amd64/intr.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/intr.c,v
retrieving revision 1.51
diff -u -p -r1.51 intr.c
--- amd64/intr.c	22 Jan 2018 09:08:43 -0000	1.51
+++ amd64/intr.c	18 Jul 2018 03:31:56 -0000
@@ -544,6 +544,7 @@ intr_handler(struct intrframe *frame, st
 struct intrhand fake_softclock_intrhand;
 struct intrhand fake_softnet_intrhand;
 struct intrhand fake_softtty_intrhand;
+struct intrhand fake_lapic_intrhand;
 struct intrhand fake_timer_intrhand;
 struct intrhand fake_ipi_intrhand;
 #if NXEN > 0
@@ -596,16 +597,28 @@ cpu_intr_init(struct cpu_info *ci)
 	isp->is_handlers = &fake_softtty_intrhand;
 	isp->is_pic = &softintr_pic;
 	ci->ci_isources[SIR_TTY] = isp;
+
 #if NLAPIC > 0
 	isp = malloc(sizeof (struct intrsource), M_DEVBUF, M_NOWAIT|M_ZERO);
 	if (isp == NULL)
 		panic("can't allocate fixed interrupt source");
 	isp->is_recurse = Xrecurse_lapic_ltimer;
 	isp->is_resume = Xresume_lapic_ltimer;
+	fake_lapic_intrhand.ih_level = IPL_LAPIC;
+	isp->is_handlers = &fake_lapic_intrhand;
+	isp->is_pic = &local_pic;
+	ci->ci_isources[LIR_LAPIC] = isp;
+
+	isp = malloc(sizeof (struct intrsource), M_DEVBUF, M_NOWAIT|M_ZERO);
+	if (isp == NULL)
+		panic("can't allocate fixed interrupt source");
+	isp->is_recurse = Xrecurse_lapic_softclock;
+	isp->is_resume = Xresume_lapic_softclock;
 	fake_timer_intrhand.ih_level = IPL_CLOCK;
 	isp->is_handlers = &fake_timer_intrhand;
-	isp->is_pic = &local_pic;
-	ci->ci_isources[LIR_TIMER] = isp;
+	isp->is_pic = &softintr_pic;
+	ci->ci_isources[SIR_LAPIC] = isp;
+
 #ifdef MULTIPROCESSOR
 	isp = malloc(sizeof (struct intrsource), M_DEVBUF, M_NOWAIT|M_ZERO);
 	if (isp == NULL)
Index: amd64/lapic.c
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/lapic.c,v
retrieving revision 1.51
diff -u -p -r1.51 lapic.c
--- amd64/lapic.c	20 Apr 2018 07:27:54 -0000	1.51
+++ amd64/lapic.c	18 Jul 2018 03:31:56 -0000
@@ -67,14 +67,16 @@
 #define DPRINTF(x...)
 #endif /* LAPIC_DEBUG */
 
-struct evcount clk_count;
+struct evcount lapic_count;
+struct evcount clock_count;
 #ifdef MULTIPROCESSOR
 struct evcount ipi_count;
 #endif
 
 void	lapic_delay(int);
 static u_int32_t lapic_gettick(void);
-void	lapic_clockintr(void *, struct intrframe);
+void	lapic_hardintr(void *, struct intrframe);
+void	lapic_softintr(void *, struct intrframe);
 void	lapic_initclocks(void);
 void	lapic_map(paddr_t);
 
@@ -349,7 +351,7 @@ lapic_set_lvt(void)
 void
 lapic_boot_init(paddr_t lapic_base)
 {
-	static u_int64_t clk_irq = 0;
+	static u_int64_t clk_irq;
 #ifdef MULTIPROCESSOR
 	static u_int64_t ipi_irq = 0;
 #endif
@@ -383,7 +385,10 @@ lapic_boot_init(paddr_t lapic_base)
 	idt_vec_set(LAPIC_HYPERV_VECTOR, Xintr_hyperv_upcall);
 #endif
 
-	evcount_attach(&clk_count, "clock", &clk_irq);
+	clk_irq = 0;
+	evcount_attach(&lapic_count, "lapic", &clk_irq);
+	clk_irq = 0;
+	evcount_attach(&clock_count, "clock", &clk_irq);
 #ifdef MULTIPROCESSOR
 	evcount_attach(&ipi_count, "ipi", &ipi_irq);
 #endif
@@ -408,7 +413,15 @@ u_int64_t lapic_frac_cycle_per_usec;
 u_int32_t lapic_delaytab[26];
 
 void
-lapic_clockintr(void *arg, struct intrframe frame)
+lapic_hardintr(void *arg, struct intrframe frame)
+{
+	softintr(SIR_LAPIC);
+
+	lapic_count.ec_count++;
+}
+
+void
+lapic_softintr(void *arg, struct intrframe frame)
 {
 	struct cpu_info *ci = curcpu();
 	int floor;
@@ -418,7 +431,7 @@ lapic_clockintr(void *arg, struct intrfr
 	hardclock((struct clockframe *)&frame);
 	ci->ci_handled_intr_level = floor;
 
-	clk_count.ec_count++;
+	clock_count.ec_count++;
 }
 
 void
Index: amd64/vector.S
===================================================================
RCS file: /cvs/src/sys/arch/amd64/amd64/vector.S,v
retrieving revision 1.73
diff -u -p -r1.73 vector.S
--- amd64/vector.S	12 Jul 2018 14:24:54 -0000	1.73
+++ amd64/vector.S	18 Jul 2018 03:31:56 -0000
@@ -587,21 +587,41 @@ IDTVEC(intr_lapic_ltimer)
 	movl	$0,_C_LABEL(local_apic)+LAPIC_EOI
 	CODEPATCH_END(CPTAG_EOI)
 	movl	CPUVAR(ILEVEL),%ebx
-	cmpl	$IPL_CLOCK,%ebx
+	cmpl	$IPL_LAPIC,%ebx
 	jae	2f
 KIDTVEC_FALLTHROUGH(resume_lapic_ltimer)
 1:
 	incl	CPUVAR(IDEPTH)
-	movl	$IPL_CLOCK,CPUVAR(ILEVEL)
+	movl	$IPL_LAPIC,CPUVAR(ILEVEL)
 	sti
 	cld
 	SMAP_CLAC
 	movq	%rbx,IF_PPL(%rsp)
 	xorq	%rdi,%rdi
-	call	_C_LABEL(lapic_clockintr)
+	call	_C_LABEL(lapic_hardintr)
 	jmp	_C_LABEL(Xdoreti)
 2:
-	movq	$(1 << LIR_TIMER),%rax
+	movq	$(1 << LIR_LAPIC),%rax
+	orq	%rax,CPUVAR(IPENDING)
+	INTRFASTEXIT
+
+KIDTVEC(recurse_lapic_softclock)
+	INTR_RECURSE_HWFRAME
+	pushq	$0
+	subq	$8,%rsp			/* unused __if_trapno */
+	INTR_REENTRY
+//	jmp	1f
+KIDTVEC_FALLTHROUGH(resume_lapic_softclock)
+1:
+	incl	CPUVAR(IDEPTH)
+	movl	$IPL_CLOCK,CPUVAR(ILEVEL)
+	sti
+	cld
+	SMAP_CLAC
+	pushq	%rbx
+	call	_C_LABEL(lapic_softintr)
+	jmp	_C_LABEL(Xdoreti)
+	movq	$(1 << SIR_LAPIC),%rax
 	orq	%rax,CPUVAR(IPENDING)
 	INTRFASTEXIT
 
Index: include/i82489var.h
===================================================================
RCS file: /cvs/src/sys/arch/amd64/include/i82489var.h,v
retrieving revision 1.17
diff -u -p -r1.17 i82489var.h
--- include/i82489var.h	22 Jun 2016 01:12:38 -0000	1.17
+++ include/i82489var.h	18 Jul 2018 03:31:56 -0000
@@ -84,6 +84,9 @@ extern void Xresume_lapic_ltimer(void);
 extern void Xrecurse_lapic_ltimer(void);
 #define LAPIC_TIMER_VECTOR		0xc0
 
+extern void Xresume_lapic_softclock(void);
+extern void Xrecurse_lapic_softclock(void);
+
 /*
  * 'pin numbers' for local APIC
  */
Index: include/intrdefs.h
===================================================================
RCS file: /cvs/src/sys/arch/amd64/include/intrdefs.h,v
retrieving revision 1.18
diff -u -p -r1.18 intrdefs.h
--- include/intrdefs.h	5 Jun 2018 06:39:11 -0000	1.18
+++ include/intrdefs.h	18 Jul 2018 03:31:56 -0000
@@ -31,7 +31,8 @@
 #define	IPL_SCHED	IPL_CLOCK
 #define	IPL_STATCLOCK	IPL_CLOCK
 #define	IPL_HIGH	0xd	/* everything */
-#define	IPL_IPI		0xe	/* inter-processor interrupts */
+#define	IPL_LAPIC	0xe
+#define	IPL_IPI		0xf	/* inter-processor interrupts */
 #define	NIPL		16
 
 #define	IPL_MPFLOOR	IPL_TTY
@@ -48,15 +49,16 @@
  * be >= NUM_LEGACY_IRQs. Note that LIR_IPI must be first.
  */
 #define LIR_IPI		63
-#define LIR_TIMER	62
+#define LIR_LAPIC	62
 
 /* Soft interrupt masks. */
-#define	SIR_CLOCK	61
-#define	SIR_NET		60
-#define	SIR_TTY		59
+#define	SIR_LAPIC	61	/* hardclock */
+#define	SIR_CLOCK	60	/* softclock */
+#define	SIR_NET		59	/* softnet */
+#define	SIR_TTY		58	/* softtty */
 
-#define	LIR_XEN		58
-#define	LIR_HYPERV	57
+#define	LIR_XEN		57
+#define	LIR_HYPERV	56
 
 /*
  * Maximum # of interrupt sources per CPU. 64 to fit in one word.